A Novel Non-exclusive Dual-Mode Architecture for MPSoCs-Oriented Network on Chip Designs

  • Francesca Palumbo
  • Simone Secchi
  • Danilo Pani
  • Luigi Raffo
Part of the Lecture Notes in Computer Science book series (LNCS, volume 5114)


Multi-Processor Systems-on-Chip (MPSoCs) are the most recent challenge of the VLSI technologies and Networks on Chip represent a high performance alternative to the traditional bus architectures. In this paper, a novel approach to the design of a dual-mode router, based on the idea of supporting both circuit and packet switching in a non-exclusive way, is presented and evaluated. This feature makes the proposed architecture suitable for MPSoCs which have to deal with heterogeneous traffic characteristics especially in terms of data size, such as the Massively Parallel Processors. Non-exclusivity enables packets latency reduction, which in turn implies lower task completion times, and also it increases throughput.


Networks on Chip Dual-mode switching Non-exclusive switching Circuit switching 


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Copyright information

© Springer-Verlag Berlin Heidelberg 2008

Authors and Affiliations

  • Francesca Palumbo
    • 1
  • Simone Secchi
    • 1
  • Danilo Pani
    • 1
  • Luigi Raffo
    • 1
  1. 1.DIEE - Dept. of Electrical and Electronic EngineeringUniversity of CagliariCagliariItaly

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