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Manipulating MAXLIVE for Spill-Free Register Allocation

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Languages and Compilers for Parallel Computing (LCPC 2005)

Abstract

This paper explores new compilation methods, including Genetic Algorithms (GAs) and a new adaptation of Sethi-Ullman numbering, to aggressively restructure basic block code and allocate registers so that the number of registers used does not exceed the number available. Although the approach applies to a wide range of target architectures, it is investigated primarily for nanocontrollers, which have a combination of properties that make avoiding spills particularly difficult, but mandatory.

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© 2006 Springer-Verlag Berlin Heidelberg

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Arcot, S.D., Dietz, H.G., Rajachidambaram, S.P. (2006). Manipulating MAXLIVE for Spill-Free Register Allocation. In: Ayguadé, E., Baumgartner, G., Ramanujam, J., Sadayappan, P. (eds) Languages and Compilers for Parallel Computing. LCPC 2005. Lecture Notes in Computer Science, vol 4339. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-69330-7_3

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  • DOI: https://doi.org/10.1007/978-3-540-69330-7_3

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-69329-1

  • Online ISBN: 978-3-540-69330-7

  • eBook Packages: Computer ScienceComputer Science (R0)

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