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Efficient State-Diagram Construction Methods for Software Pipelining

  • Chihong Zhang
  • Ramaswamy Govindarajan
  • Sean Ryan
  • Guang R. Gao
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 1575)

Abstract

State diagram based approach has been proposed as an effective way to model resource constraints in traditional instruction scheduling and software pipelining methods. However, the constructed state diagram for software pipelining method (i) is very large and (ii) contains significant amount of replicated, and hence redundant, information on legal latency sequences. As a result, the construction of state diagrams can take very large computation time.

In this paper, we propose two methods for the efficient construction of state diagrams. In the first method, we relate the construction of state diagram to a well-known problem in graph theory, namely the enumeration of maximal independent sets of a graph. This facilitates the use of an existing algorithm as a direct method for constructing distinct latency sequences. The second method is a heuristic approach which exploits the structure of state diagram construction to eliminate redundancy at the earliest opportunity in an aggressive fashion. The heuristic method uses a surprisingly simple check which is formally shown to completely eliminate redundancy in the state diagram. From our experimental results on two real architectures, both of the two methods show a great reduction in state diagram construction time.

Keywords

State Diagram Construction Time Latency Sequence Redundancy Constraint Interference Graph 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

References

  1. 1.
    Altman, E.R.: Optimal Software Pipelining with Function Unit and Register Constraints. Ph.D. thesis, McGill U., Montréal, Qué (October 1995)Google Scholar
  2. 2.
    Bala, V., Rubin, N.: Efficient instruction scheduling using finite state automata. In: Proc. of the 28th Ann. Intl. Symp. on Microarchitecture, Ann Arbor, November 29–December 1, pp. 46–56 (1995)Google Scholar
  3. 3.
    Beck, G., Yen, D.W.L., Anderson, T.L.: The Cydra-5 minisupercomputer: Architecture and implementation. Journal of Supercomputing 7 (1993)Google Scholar
  4. 4.
    Eichenberger, A.E., Davidson, E.S.: A reduced multipipeline machine description that preserves scheduling constraints. In: Proc. of the ACM SIGPLAN 1996 Conf. on Programming Language Design and Implementation, Philadelphia, PA, May 21–24, pp. 12–22 (1996)Google Scholar
  5. 5.
    Golumbic, M.C.: Algorithmic Graph Theory and Perfect Graphs. Academic Press, New York (1980)zbMATHGoogle Scholar
  6. 6.
    Govindarajan, R., Altman, E.R., Gao, G.R.: Co-scheduling hardware and software pipelines. In: Proc. of the Second Intl. Symp. on High-Performance Computer Architecture, San Jose, CA, February 3–7, pp. 52–61. IEEE Computer Society, Los Alamitos (1996)CrossRefGoogle Scholar
  7. 7.
    Govindarajan, R., Narasimha Rao, N.S.S., Altman, E.R., Gao, G.R.: An enhanced co-scheduling method using reduced ms-state diagrams. In: Proc. of the 12th Intl. Parallel Processing Symp., Orlando, FL, IEEE Computer Society, Los Alamitos (1998); Merged with 9th Intl. Symp. on Parallel and Distributed ProcessingGoogle Scholar
  8. 8.
    Govindarajan, R., Narasimha Rao, N.S.S., Altman, E.R., Gao, G.R.: An enhanced co-scheduling method using reduced ms-state diagrams. CAPSL Technical Memo 17, Dept. of Electrical & Computer Engineering, University of Delaware, Newark 19716, U.S.A. (February 1998); Also as Tech. Report TR-98-06, Dept. of Computer Science & Automation, Indian Institute of Science, Bangaloe, 560 012, India (available via) http://www.csa.iisc.ernet.in/~govind/papers/TR-98-2.ps.gz
  9. 9.
    Huff, R.A.: Lifetime-sensitive modulo scheduling. In: Proc. of the ACM SIGPLAN 1993 Conf. on Programming Language Design and Implementation, Albuquerque, New Mexico, June 23–25, pp. 258–267 (1993)Google Scholar
  10. 10.
    Lam, M.: Software pipelining: An effective scheduling technique for VLIW machines. In: Proc. of the SIGPLAN 1988 Conf. on Programming Language Design and Implementation, Atlanta, Georgia, June 22–24, pp. 318–328 (1988)Google Scholar
  11. 11.
    Liu, C.L.: Introduction to Combinatorial Mathematics. McGraw-Hill Book Co., New York (1968)zbMATHGoogle Scholar
  12. 12.
    Muller, T.: Employing finite state automata for resource scheduling. In: Proc. of the 26th Ann. Intl. Symp. on Microarchitecture, Austin, TX, December 1–3 (1993)Google Scholar
  13. 13.
    Patel, J.H., Davidson, E.S.: Improving the throughput of a pipeline by insertion of delays. In: Proc. of the 3rd Ann. Symp. on Computer Architecture, Clearwater, FL, January 19–21, pp. 159–164 (1976)Google Scholar
  14. 14.
    Proebsting, T.A., Fraser, C.W.: Detecting pipeline structural hazards quickly. In: Conf. Record of the 21st ACM SIGPLAN-SIGACT Symp. on Principles of Programming Languages, Portland, OR, January 17–21, pp. 280–286 (1994)Google Scholar
  15. 15.
    Rau, B.R., Fisher, J.A.: Instruction-level parallel processing: History, overview and perspective. Journal of Supercomputing 7, 9–50 (1993)CrossRefGoogle Scholar
  16. 16.
    Rau, B.R.: Iterative modulo scheduling: An algorithm for software pipelining loops. In: Proc. of the 27th Ann. Intl. Symp. on Microarchitecture, San Jose, California, November 30–December 2, pp. 63–74 (1994)Google Scholar
  17. 17.
    Ruttenberg, J., Gao, G.R., Stouchinin, A., Lichtenstein, W.: Software pipelining showdown: Optimal vs. heuristic methods in a production compiler. In: Proc. of the ACM SIGPLAN 1996 Conf. on Programming Language Design and Implementation, Philadelphia, PA, May 21–24, pp. 1–11 (1996)Google Scholar
  18. 18.
    Tsukiyama, S., Ide, M., Ariyoshi, H., Shirakawa, I.: A new algorithm for generating all the maximal independent sets. SIAM Jl. on Computing 6(3), 505–517 (1977)zbMATHCrossRefMathSciNetGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1999

Authors and Affiliations

  • Chihong Zhang
    • 1
  • Ramaswamy Govindarajan
    • 2
  • Sean Ryan
    • 1
  • Guang R. Gao
    • 1
  1. 1.Dept. of Electric and Computer EngineeringUniv. of Delaware NewarkUSA
  2. 2.Indian Institute of ScienceSupercomputer Edn. & Res. CentreBangaloreIndia

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