Abstract
A framework of dynamically adaptive hardware mechanism on multicontext reconfigurable devices is proposed, and as an example, an adaptive switching fabric is implemented on NEC’s novel reconfigurable device DRP(Dynamically Reconfigurable Processor).
In this switch, contexts for the full crossbar and alternative hardware modules, which provide larger bandwidth but can treat only a limited pattern of packet inputs, are prepared. Using the quick context switching functionality, a context for the full crossbar is switched by alternative contexts according to the packet inputs pattern. Furthermore, if the traffic includes a lot of packets for specific destinations, a set of contexts frequently used in the traffic is gathered inside the chip like a working set stored in a cache.
4 x 4 mesh network connected with the proposed adaptive switches is simulated, and it appears that the latency between nodes is improved three times when the traffic between neighboring four nodes is dominant.
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References
Motomura, M.: A Dynamically Reconfigurable Processor Architecture. Microprocessor Forum (October 2002)
Master, P.: The Age of Adaptive Computing Is Here. In: Proc. of FCCM, pp.1–3 (2002)
Smit, G.J.M., Havinga, P.J.M., Smit, L.T., Heysters, P.M.: Dynamic Reconfiguration in Mobile Systems. In: Glesner, M., Zipf, P., Renovell, M. (eds.) FPL 2002. LNCS, vol. 2438, pp. 162–170. Springer, Heidelberg (2002)
Horta, E.L., Lockwood, J.W., Partour, D.: Dynamic Hardware Plugins in an FPGA with Partial Run-time Reconfiguration. In: Proc. of DAC 2002 (June 2002)
Ling, X.-P., Amano, H.: WASMII: A Data Driven Computer on a Virtual Hardware. In: Proc. FCCM, pp. 33–42 (1993)
Trimberger, S., Carberry, D., Johnson, A., Wong, J.: A Time-Multiplexed FPGA. In: Proc. FCCM pp.22-28 (1997)
Kaneko, N., Amano, H.: A General Hardware Design Model for Multicontext FPGAs. In: Glesner, M., Zipf, P., Renovell, M. (eds.) FPL 2002. LNCS, vol. 2438, pp. 1037–1047. Springer, Heidelberg (2002)
Nishimura, S., et al.: High-speed network switch RHiNET-2/SW and its implementation with optical interconnections. Hot Interconnects 8, 31–38 (2000)
Brebner, G.: The Swappable Logic Unit: a Paradigm for Virtual Hardware. In: Proc. of FCCM, pp.82–91 (1997)
Li, Z., Compton, K., Hauck, S.: Configuration Caching Management Techniques for Reconfigurable Computing. In: Proc. of FCCM, pp.22–36 (2000)
Higuchi, T., Kajihara, N.: Evolvable hardware chips for industrial applications. Commun. ACM 42(3), 60–66 (1999)
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Amano, H., Jouraku, A., Anjo, K. (2003). A Dynamically Adaptive Switching Fabric on a Multicontext Reconfigurable Device. In: Y. K. Cheung, P., Constantinides, G.A. (eds) Field Programmable Logic and Application. FPL 2003. Lecture Notes in Computer Science, vol 2778. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-45234-8_17
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DOI: https://doi.org/10.1007/978-3-540-45234-8_17
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