Minimizing Variables’ Lifetime in Loop-Intensive Applications

  • Noureddine Chabini
  • Wayne Wolf
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2855)


In this paper, we address a set of research problems regarding loopintensive applications. The first problem consists of minimizing variables’ lifetime under timing constraints. Any variable that is alive for more than one iteration must be saved by for instance storing it into a register. The second problem is derived from the first one, and consists of balancing variables’ lifetime for a target total number of registers and under timing constraints. For the third problem, we focus on minimizing variables’ lifetime in the context of software pipelining in the case of one loop as well as nested loops. We provide methods to solve these three problems, and show that a set of them have polynomial run-time. Once these methods are used, one may need to solve the problem of generating the transformed code and reducing its size. We provide algorithms to solve this fourth problem. Designers face these problems during hardware-software co-design, and in designing embedded systems as well as system-on-chip. Solving these problems is also useful in low power design. We exercise some of these methods on known benchmarks, and provide obtained numerical results that show their effectiveness. We solve these problems using techniques related to retiming, an algorithm originally developed for hardware optimization.


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  1. 1.
    Leiserson, C.E., Saxe, J.B.: Retiming Synchronous Circuitry. Algorithmica, 5–35 (January 1995)Google Scholar
  2. 2.
    Fraboulet, A., Mignotte, A., Huard, G.: Loop alignment for memory accesses optimization. In: Proc. of the 12th International Symposium on System Synthesis, November 1999, pp. 71–77 (1999)Google Scholar
  3. 3.
    Chabini, N.: WolfW.: Reducing Dynamic Power Consumption in Synchronous Sequential Digital Designs Using Retiming and Supply Voltage Scaling. Submitted to IEEE Transactions on VLSI (March 2003)Google Scholar
  4. 4.
    Zhuge, Q., Shao, Z., Sha, E.H.-M.: Optimal Code Size Reduction for Software-Pipelined Loops on DSP Applications. In: Proceedings of the International Conference on Parallel Processing, Vancouver, Canada (August 2002)Google Scholar
  5. 5.
    Zhuge, Q., Xiao, B., Sha, E.H.-M.: Code Size Reduction Technique and Implementation for Software-Pipelined DSP Applications. Submitted to ACM Transcations in Embedded Computing SystemsGoogle Scholar
  6. 6.
    Catthoor, F., Danckaert, K., Wuytack, S., Dutt, N.-D.: Code transformations for data transfer and storage exploration preprocessing in multimedia processors. IEEE Design & Test of Computers 18(3), 70–82 (2001)CrossRefGoogle Scholar
  7. 7.
    Allan, V., Jones, R.B., Lee, R.M., Allan, S.J.: Software Pipelining. ACM Computmg Surveys 27(3) (September 1995)Google Scholar
  8. 8.
    Ramanujam, J.: Optimal Software Pipelining of Nested Loops. In: Proceeding 8th International Parallel Processing Symposium, April 1994, pp. 335–342 (1994)Google Scholar
  9. 9.
    Panda, P.-R., et al.: Data and memory optimization techniques for embedded systems. ACM Trans. on Design Automation of Electronic Systems 6(2) (April 2001)Google Scholar
  10. 10.
    Dasdan, A., Gupta, R.K.: Faster Maximum and Minimum Mean Cycle Algorithms for System Performance Analysis. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 17(10) (October 1998)Google Scholar
  11. 11.
    Passos, N.-L., Sha, E.H.-M.: Achieving full parallelism using multidimensional retiming. IEEE Transactions on Parallel and Distributed Systems 7(11), 1150–1163 (1996)CrossRefGoogle Scholar
  12. 12.
    Schrijver, A.: Theory of linear and integer programming. John Wiley and Sons, Chichester (1986)zbMATHGoogle Scholar
  13. 13.
    Khachian, L.-G.: A polynomial algorithm in linear programming. Soviet Math Doklady 20 (1979)Google Scholar
  14. 14.
    Karmakar, N.: A new polynomial-time algorithm for linear programming. Combinatorica 4 (1984)Google Scholar
  15. 15.
    Camion P. : Characterisation of totally unimodular matrices. Proc. of the Amer. Math. Soc. 16 (1965) Google Scholar
  16. 16.
  17. 17.
    ISCAS 1989 Benchmark suite. North Carolina State University, Department of Computer Science,

Copyright information

© Springer-Verlag Berlin Heidelberg 2003

Authors and Affiliations

  • Noureddine Chabini
    • 1
  • Wayne Wolf
    • 1
  1. 1.Computer Engineering, Department of Electrical EngineeringPrinceton University, Engineering QuadranglePrincetonUSA

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