Improving Offset Assignment through Simultaneous Variable Coalescing

  • Desiree Ottoni
  • Guilherme Ottoni
  • Guido Araujo
  • Rainer Leupers
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2826)


Efficient address code optimization is a central problem in code generation for processors with restricted addressing modes, like Digital Signal Processors (DSPs). This paper proposes a new heuristic to solve the Simple Offset Assignment (SOA) problem, the problem of allocating scalar variables to memory so as to minimize addressing code. This new approach, called Coalescing SOA (CSOA), performs variable memory slot coalescing simultaneously to offset assignment computation. Experimental results, based on compiling MediaBench benchmark programs with LANCE compiler, reveal a very significant improvement over the previous solutions to SOA. In fact, CSOA produces, on average, 37.3% fewer update instructions when comparing with the prior solution that perform memory slot coalescing before applying SOA, and 66.2% fewer update instructions when comparing with the best traditional SOA solution.


Basic Block Address Register Memory Word Interference Graph Memory Layout 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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  1. 1.
    Aho, A.V., Sethi, R., Ullman, J.D.: Addressing Modes for Fast and Optimal Code Generation (1987)Google Scholar
  2. 2.
    Araujo, G., Ottoni, G., Cintra, M.: Global array reference allocation. ACM Trans. on Design Automation of Electronic Systems 7(2), 336–357 (2002)CrossRefGoogle Scholar
  3. 3.
    Araujo, G., Sudarsanam, A., Malik, S.: Instruction set design and optimizations for address computation in DSP architectures. In: Proc. of the 9th. ACM/IEEE International Symposium on System Synthesis, November 1996, pp. 102–107 (1996)Google Scholar
  4. 4.
    Atri, S., Ramanujam, J., Kandemir, M.: Improving offset assignment for embedded processors. In: Midkiff, S.P., Moreira, J.E., Gupta, M., Chatterjee, S., Ferrante, J., Prins, J.F., Pugh, B., Tseng, C.-W. (eds.) LCPC 2000. LNCS, vol. 2017, p. 158. Springer, Heidelberg (2001)CrossRefGoogle Scholar
  5. 5.
    Bartley, D.H.: Optimizing stack frame accesses for processors with restricted addressing modes. Software - Practice and Experience 22(2), 101–110 (1992)CrossRefGoogle Scholar
  6. 6.
    Choi, Y., Kim, T.: Address assignment combined with scheduling in DSP code generation. In: Proc. of the 39th Design Automation Conference, DAC 2002 (2002)Google Scholar
  7. 7.
    Cintra, M., Araujo, G.: Array reference allocation using ssaform and live range growth. In: Proc. of the ACM SIGPLAN 2000 LCTES, June 2000, pp. 26–33 (2000)Google Scholar
  8. 8.
    LANCE Retargetable C compiler,
  9. 9.
    Eckstein, E., Krall, A.: Minimizing cost of local variables access for DSP-processors. In: Proc. of the ACM SIGPLAN 1999 LCTES (1999)Google Scholar
  10. 10.
    Kempe, A.: On the geografical problem of four colors. Amer. J. Math 2 (1879)Google Scholar
  11. 11.
    Kogure, N., Sugino, N., Nishihara, A.: Memory address allocation method with ± 2 update operations in indirect addressing. In: European Conference on Circuit Theory and Design, ECCTD (1997)Google Scholar
  12. 12.
    Kruskal, J.B.: On the shortest spanning subtree of a graph and the traveling salesman problem. In: Proceedings of the American Mathematical Society, vol. 7, pp. 48–50 (1956)Google Scholar
  13. 13.
    Lee, C., Potkonjak, M.: William H., Mangione-Smith.: Mediabench: A tool for evaluating and synthesizing multimedia and communications systems. In: Proc. of the 30th Annual International Symposium on Microarchitecture (Micro 30) (December 1997)Google Scholar
  14. 14.
    Leupers, R.: Code generation for embedded processors. In: International System Synthesis Symposium (2000)Google Scholar
  15. 15.
    Leupers, R.: Offset assignment showdown: Evaluation of DSP address code optimization algorithms. In: Proceedings of the 12th International Conference on Compiler Construction (April 2003)Google Scholar
  16. 16.
    Leupers, R., Basu, A., Marwedel, P.: Optimized array index computation in DSP programs. In: Proc. of the Asia South Pacific Design Automation Conference (ASP-DAC). IEEE, Los Alamitos (April 1998)Google Scholar
  17. 17.
    Leupers, R., David, F.: A uniform optimization technique for offset assignment problems. In: Proc. of the International Symposium on System Synthesis (ISSS), pp. 3–8 (1998)Google Scholar
  18. 18.
    Leupers, R., Marwedel, P.: Algorithms for address assignment in DSP code generation. In: International Conference on Computer-Aided Design (ICCAD), pp. 109–112 (1996)Google Scholar
  19. 19.
    Liao, S.: Code Generation and Optimization for Embedded Digital Signal Processors. Ph.D thesis, Massachusetts Institute of Technology (1996)Google Scholar
  20. 20.
    Liao, S., Devadas, S., Keutzer, K., Tjiang, S., Wang, A.: Storage assignment to decrease code size. ACM Transactions on Programming Languages and Systems 18(3), 235–253 (1996)CrossRefGoogle Scholar
  21. 21.
    Muchnick, S.S.: Advanced Compiler Design and Implementation. Morgan Kaufmann, San Francisco (1997)Google Scholar
  22. 22.
  23. 23.
    Ottoni, G., Rigo, S., Araujo, G., Rajagopalan, S., Malik, S.: Optimal live range merge for address register allocation in embedded programs. In: Wilhelm, R. (ed.) CC 2001. LNCS, vol. 2027, pp. 274–288. Springer, Heidelberg (2001)CrossRefGoogle Scholar
  24. 24.
    Rao, A., Pande, S.: Storage assignment optimizations to generate compact and efficient code on embedded DSPs. In: SIGPLAN Conference on Programming Language Design and Implementation, pp. 128–138 (1999)Google Scholar
  25. 25.
    Sudarsanam, A., Liao, S., Devadas, S.: Analysis and evaluation of address arithmetic capabilities in custom DSP architectures. In: Design Automation Conference, pp. 287–292 (1997)Google Scholar
  26. 26.
    Wess, B., Gotschlich, M.: Optimal DSP memory layout generations a quadratic assignment problem. In: Int. Symp. on Circuits and Systems (ISCAS) (1997)Google Scholar

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© Springer-Verlag Berlin Heidelberg 2003

Authors and Affiliations

  • Desiree Ottoni
    • 1
  • Guilherme Ottoni
    • 2
  • Guido Araujo
    • 1
  • Rainer Leupers
    • 3
  1. 1.IC-UNICAMPBrazil
  2. 2.Department of Computer SciencePrinceton UniversityUSA
  3. 3.Integrated Signal Processing SystemsAachen University of TechnologyGermany

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