Skip to main content

An AMBA-ARM7 Formal Verification Platform

  • Conference paper

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 2885))

Abstract

The pressure to create a working System on Chip design as early as possible leads designers to consider using a platform based design method. In this approach, designing an application is a matter of selecting from a set of standard components with compatible specifications. Subsequently, a formal verification platform can be constructed. The formal verification platform provides an environment to analysed the combined properties of the design. In this paper, we present a methodology to do formal System on Chip analysis by developing generic formal components that can be integrated in a formal verification platform. First, we develop reusable formal properties of standard components. Second, we define a generic formal platform in which components of System on Chip design can be integrated. The platform contains basic components such as a standard bus protocol and a processor. Third, we combine the properties of standard components and obtain a set of refined properties of the system. We use these properties to develop the required specifications of the remaining components.

This is a preview of subscription content, log in via an institution.

Buying options

Chapter
USD   29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD   84.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD   109.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Learn about institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. Aagaard, M.D., Jones, R.B., Seger, C.-J.H.: Combining Theorem Proving and Trajectory Evaluation in an Industrial Environment. In: The 35th Design Automation Conference, San Francisco, California, June 1998, pp. 538–541 (1998)

    Google Scholar 

  2. ARM, ARM-7 Datasheet, DDI 0020C (December 1994)

    Google Scholar 

  3. ARM, AMBA specification ver 2.0, IHI-0011A (May 1999)

    Google Scholar 

  4. Birnbaum, M., Sachs, H.: How VSIA Answers the SOC Dilemma. In: IEEE Computer magazine, June 1999, pp. 42–50 (1999)

    Google Scholar 

  5. Camilleri, A.J.: A Hybrid Approach to Verifying Liveness in a Symmetric Multi- Processor. In: Gunter, E.L., Felty, A.P. (eds.) TPHOLs 1997. LNCS, vol. 1275, pp. 49–67. Springer, Heidelberg (1997)

    Chapter  Google Scholar 

  6. Chang, H., Cooke, L., Hunt, M., Martin, G., McNelly, A., Todd, L.: Surviving the SOC Revolution. In: A Guide to Platform-Based Design. Kluwer, Dordrecht (1999)

    Google Scholar 

  7. Dennis, L.A., Collins, G., Norrish, M., Boulton, R., Slind, K., Robinson, G., Gordon, M., Melham, T.: The PROSPER Toolkit. In: Schwartzbach, M.I., Graf, S. (eds.) TACAS 2000. LNCS, vol. 1785, pp. 78–92. Springer, Heidelberg (2000)

    Chapter  Google Scholar 

  8. Gordon, M.J.C., Melham, T.F. (eds.): Introduction to HOL: A theorem proving environment for higher order logic. Cambridge University Press, Cambridge (1993)

    MATH  Google Scholar 

  9. The HOL System Description, HOL98 Taupo–6, University of Cambridge (February 2000)

    Google Scholar 

  10. Hunt, W.A.: FM8501: A Verified Microprocessor. LNCS, vol. 795. Springer, Heidelberg (1994)

    MATH  Google Scholar 

  11. Ip, C.N., Dill, D.L.: Better Verification Through Symmetry. In: Agnew, D., Claesen, L., Compasano, R. (eds.) Computer Hardware Description Languages and their Applications, pp. 87–100. Elsevier Science Publishers, Amsterdam

    Google Scholar 

  12. Jones, R.B., O’Leary, J.W., Seger, C.-J.H., Aagaard, M.D., Melham, T.F.: Practical Formal Verification in Microprocessor Design. IEEE Design & Test of Computers magazine, 16–25 (July/August 2001)

    Google Scholar 

  13. Litterick, M.: ARM Integration Platform Power Management, Scotland. The Institute of System Level Integration (November 2001)

    Google Scholar 

  14. Kaufmann, M., Manolios, P., Moore, J.S.: Computer-Aided Reasoning, An Approach. Kluwer, Dordrecht (2000)

    Google Scholar 

  15. Kaufmann, M., Manolios, P., Moore, J.S.: Computer-Aided Reasoning, ACL2 Case Studies. Kluwer, Dordrecht (2000)

    Google Scholar 

  16. Keating, M., Bricaud, P.: Reuse Methodology Manual For System–On– a–Chip Designs. Kluwer Academic Publisher, Norwell (1999)

    Google Scholar 

  17. McMillan, K.L.: Symbolic Model Checking. Kluwer Academic Publisher, Norwell (1993)

    MATH  Google Scholar 

  18. Moore, J.S.: Symbolic Simulation: An ACL2 Approach. In: Gopalakrishnan, G.C., Windley, P. (eds.) FMCAD 1998. LNCS, vol. 1522, pp. 334–350. Springer, Heidelberg (1998)

    Chapter  Google Scholar 

  19. Pixley, C.: Formal Verification of Commercial Integrated Circuits. IEEE Design & Test of Computers magazine, 4–5 (July/August 2001)

    Google Scholar 

  20. RAPIER, The Institute of System Level Integration, Scotland (2001)

    Google Scholar 

  21. Rincon, A.M., Cherichetti, C., Monzel, J.A., Stauffer, D.R., Trick, M.T.: Core Design and System-on-a-Chip Integration. IEEE Design & Test of Computers magazine, 26–35 (October–December 1997)

    Google Scholar 

  22. Schneider, K.: Yet another look at LTL model checking. In: Pierre, L., Kropf, T. (eds.) CHARME 1999. LNCS, vol. 1703, pp. 321–325. Springer, Heidelberg (1999)

    Chapter  Google Scholar 

  23. Shimizu, K., Dill, D.L., Chou, C.-T.: A Specification Methodology by a Collection of Compact Properties as Applied to the Intel Itanium Processor Bus Protocol. In: Margaria, T., Melham, T.F. (eds.) CHARME 2001. LNCS, vol. 2144, pp. 340–354. Springer, Heidelberg (2001)

    Chapter  Google Scholar 

  24. Srivas, M., Rueβ, H., Cyrluk, D.: Hardware Verification using PVS. In: Kropf, T. (ed.) Formal Hardware Verification. LNCS, vol. 1287, pp. 156–205. Springer, Heidelberg (1997)

    Google Scholar 

  25. Staples, M.: Linking ACL2 and Hol, Computer Laboratory, University of Cambridge, Technical Report No. 476 (November 1999)

    Google Scholar 

  26. Susanto, K.W.: An integrated Formal Approach for System on Chip. In: IP based Design, Grenoble, France, October 2002, pp. 119–123 (2002)

    Google Scholar 

  27. Winston, P.H., Horn, B.K.P.: LISP. Addison-Wesley Pub.Co., Reading (1989)

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2003 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Susanto, K.W., Melham, T. (2003). An AMBA-ARM7 Formal Verification Platform. In: Dong, J.S., Woodcock, J. (eds) Formal Methods and Software Engineering. ICFEM 2003. Lecture Notes in Computer Science, vol 2885. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-39893-6_5

Download citation

  • DOI: https://doi.org/10.1007/978-3-540-39893-6_5

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-20461-9

  • Online ISBN: 978-3-540-39893-6

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics