Reduced Leverage of Dual Supply Voltages in Ultra Deep Submicron Technologies

  • Tim Schoenauer
  • Joerg Berthold
  • Christoph Heer
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2799)


Dual supply voltage (DSV) is a low-power design technique, which reduces the dynamic power dissipation of a digital circuit [1]. In this paper we will summarize the basic idea of this approach, its benefit and associated costs and outline the dependency of DSV on technology and device parameters. We then evaluate the use of DSV on gate level in the context of the evolving ultra deep submicron (UDSM) technology. Employing DSV exhibits a reduced leverage – especially for leakage sensitive applications – mainly due to a limited reduction of threshold voltages in UDSM technologies and due to the use of multi-threshold devices. Finally we discuss DSV design examples reported in literature and give an outlook on how their benefit is influenced by UDSM technologies.


Threshold Voltage Supply Voltage Power Dissipation Power Reduction Path Delay 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer-Verlag Berlin Heidelberg 2003

Authors and Affiliations

  • Tim Schoenauer
    • 1
  • Joerg Berthold
    • 1
  • Christoph Heer
    • 1
  1. 1.Infineon Technologies, CL AIP Advanced Macros & ArchitecturesMünchenGermany

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