Advertisement

Power Estimation Approach of Dynamic Data Storage on a Hardware Software Boundary Level

  • Marc Leeman
  • David Atienza
  • Francky Catthoor
  • V. De Florio
  • G. Deconinck
  • J. M. Mendias
  • R. Lauwereins
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2799)

Abstract

In current multimedia applications like 3D graphical processing or games, the run-time memory management support has to allow real-time memory de/allocation, retrieving and data processing. The implementations of these algorithms for embedded platforms require high speed, low power and large data storage capacity. Due to the large hardware/software co-design space, high-level implementation cost estimates are required to avoid expensive design modifications late in the implementation. In this paper, we present an approach designed to do that. Based on memory accesses, normalised memory usage and power estimates, the algorithm code is refined. Furthermore, optimal implementations for the dynamic data types involved can be selected with a considerable power contribution reduction.

Keywords

Power Consumption Multimedia Application Memory Hierarchy Dynamic Memory Memory Footprint 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    Amrutur, B.S., et al.: Speed and Power Scaling of SRAM’s. IEEE Trans. on Solid-State Circuits 35(2) (2000)Google Scholar
  2. 2.
    Benin, L., et al.: A power modeling and estimation framework for vliw-based embedded systems. In: Proc. of PATMOS, Yverdon Les Bains, Switzerland, pp. 2.1.1–2.1.10 (2001)Google Scholar
  3. 3.
    Catthoor, F., et al.: Custom Memory Management Methodology – Exploration of Memory Organisation for Embedded Multimedia System Design. Kluwer Academic Publishers, Boston (1998)zbMATHGoogle Scholar
  4. 4.
    Chen, R.Y., et al.: Speed and Power Scaling of SRAM’s. ACM Trans. on Design Automation of Electronic Systems 6(1) (2001)Google Scholar
  5. 5.
    Daylight, E.G., et al.: Incorporating energy efficient data structures into modular software implementations for internet-based embedded systems. In: Proc. of wrkshp on Software Performance (2002)Google Scholar
  6. 6.
    Horowitz, M.A.: Timing models for mos circuits. Technical report, Technical Report SEL83-003, Integrated Circuits Lab. Stanford Univ. (1983)Google Scholar
  7. 7.
    Jouppi, N.: Western research laboratory, cacti (2002), http://research.compaq.com/wrl/people/jouppi/CACTI.html
  8. 8.
    Leeman, M., et al.: Methodology for refinement and optimisation of DM management for embedded systems in multimedia applications. In: Proc. of SiPS, Seoul, Korea (2003)Google Scholar
  9. 9.
    Leeman, M., et al.: Intermediate variable elimination in a global context for a 3d multimedia pplication. In: Proc. of ICME, Baltimore, MD (2003)Google Scholar
  10. 10.
    Mudge, T.: Power: A first class architectural design constraint. IEEE Computer 34(4), 52–58 (2001)Google Scholar
  11. 11.
    Pollefeys, M., et al.: Metric 3D surface reconstruction from uncalibrated image sequences. In: Koch, R., Van Gool, L. (eds.) SMILE 1998. LNCS, vol. 1506, pp. 139–153. Springer, Heidelberg (1998)CrossRefGoogle Scholar
  12. 12.
    Smaragdakis, Y., et al.: Implementing layered designs with mixin layers. In: Jul, E. (ed.) ECOOP 1998. LNCS, vol. 1445, p. 550. Springer, Heidelberg (1998)CrossRefGoogle Scholar
  13. 13.
    Stroustrup, B.: The C++ Programming Language. Addison-Wesley Publishing Company, Inc., Harlow (1997)Google Scholar
  14. 14.
    Tiwari, V., et al.: Power analysis of embedded software: A first step towards software power minimization. In: Proc. of ICCAD, San Jose, California, USA (1994)Google Scholar
  15. 15.
    Vijaykrishnan, N., et al.: Evaluating integrated hardware-software optimizations using a unified energy estimation framework. IEEE Transactions on Computers 52(1), 59–75 (2003)CrossRefMathSciNetGoogle Scholar
  16. 16.
    Wuytack, S., et al.: Global communication and memory optimizing transformations for low power systems. In: IEEE Intnl. wrkshp on Low Power Design, Napa CA, pp. 203–208 (1994)Google Scholar
  17. 17.
    Ykman, C., et al.: Dynamic Memory Management MethodologyApplied to Embedded Telecom etwork Systems. IEEE Transactions on VLSI Systems (2002)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2003

Authors and Affiliations

  • Marc Leeman
    • 1
  • David Atienza
    • 2
    • 3
  • Francky Catthoor
    • 3
  • V. De Florio
    • 1
  • G. Deconinck
    • 1
  • J. M. Mendias
    • 2
  • R. Lauwereins
    • 3
  1. 1.ESAT/K.U.LEUVENLeuvenBelgium
  2. 2.DACYA/U.C.M.MadridSpain
  3. 3.IMEC vzwLeuvenBelgium

Personalised recommendations