Abstract
Designers continue to be challenged with the need to manage power together with timing and signal integrity throughout the design flow. Synopsys Low Power solution optimizes and verifies your low power designs within the GalaxyTM Design Platform. Learn how to optimize for dynamic and leakage power using Power CompilerTM within Synopsys industry-leading synthesis flow. Discover how PrimePower precisely debugs your design through accurate peak power verification.
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© 2003 Springer-Verlag Berlin Heidelberg
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Chico, J.J., Macii, E. (2003). Power Management in Synopsys Galaxy Design Platform. In: Chico, J.J., Macii, E. (eds) Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2003. Lecture Notes in Computer Science, vol 2799. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-39762-5_24
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DOI: https://doi.org/10.1007/978-3-540-39762-5_24
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-20074-1
Online ISBN: 978-3-540-39762-5
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