Abstract
This paper presents a new pseudo-exhaustive testing algorithm that is composed of the path sensitization and sub-circuit partitioning using t-distribution. In the proposed testing algorithm, the paths, for the path sensitization the, between PIs and POs based on the high TMY(test-mainstay) nodes of CUT(circuit under test) are sensitized and the boundary nodes, for the partitioned sub-circuits, are defined on the level of significance α on t-distribution respectively. As a consequence, when (1-α) is 0.2368, the most suitable of the performance to operate the singular cover and consistency operation in the path sensitization. And when α is 0.5217, the most suitable of the performance to partition the sub-circuit in sub-circuit partitioning.
This is a preview of subscription content, log in via an institution.
Buying options
Tax calculation will be finalised at checkout
Purchases are for personal use only
Learn about institutional subscriptionsPreview
Unable to display preview. Download preview PDF.
References
Goel, P.: Test Generation Costs Analysis and Projections. In: The 17th Design Automation Conference, pp. 77–84. ACM/IEEE, Los Alamitos (1980)
Abramovici, M., Breuer, M.A., Friedman, A.D.: Digital Systems Testing and Testable Design. Computer Science Press, New York (1990)
Bushnell, M.L., Agrawal, V.D.: Essentials of Electronic Testing for Digital, Memory & Mixed-Signal VLSI Circuits. Kluwer Academic Publishers, Dordrecht (2000)
McCluskey, E.J.: Verification Testing A Pseudo - Exhaustive Test Technique. IEEE Trans. C-33(6), 541–546 (1984)
Srinivasan, R., Gupta, S.K., Beruer, M.A.: Novel Test Pattern Generators for Pseudo- Exhaustive Testing. In: Proceedings of international test conference, pp. 1041–1050 (1993)
Wu, E., Rutkowski, P.W.: PEST - A Tool for Implementing Pseudo-Exhaustive Self Test. In: Proc. of 1st European Design Automation Conf., March 1990, pp. 639–643 (1990)
Chen, C.I.H., Yuen, J.T.: Automated Synthesis of Pseudo-Exhaustive Test Generator in VLSI BIST Design. IEEE Trans. on VLSI Systems 2(3), 273–291 (1994)
Kagaris, D., Makedon, F., Tragoudas, S.: A Method for Pseudo-Exhaustive Test Pattern Generation. IEEE Trans. CAD-13, 990, 1170–1178 (1994)
Rhee, K.H.: A Study on the Pseudo-exhaustive Test using a Net-list of Multi-level Combinational Logic Circuits. Jour. of KITE 30-B(5) (May 1993)
McCluskey, E.J.: Verification testing A Pseudo- exhaustive test technique. IEEE Trans. Computers C-33(6), 541–546 (1984)
McCluskey, E.J.: Exhaustive and Pseudo- exhaustive Test, Built-in Test Concepts and Techniques, Tutorial, ITC83
Udell, J.G.: Test set generation for pseudo-exhaustive BIST, in Dig. Papers. In: IEEE 1986 Int., Conf. Computer Aided Design, Santa Clara, CA, November 1986, pp. 52–55 (1986)
Shperling, I., McCluskey, E.J.: Circuit Segmentation for Pseudo-exhaustive Testing, Stanford Univ., CRC Tech. Report, no. 87-2, CSL no. 87–315 (May 1987)
Rhee, K.H.: A Study on the Development of Fault Simulator for the Pseudoexhaustive Test of LSI/VLSI. Jour. of KITE, 32-B(4) (April 1995)
lohnson, B.W.: lohnson, Design and Analysis of Fault-Tolerant Digital System, Addison Wesley, pp. 554–565. Addison Wesley, Reading (1989)
Wang, D.T.: An algorithm for the detection of tests set for combinational logic networks. IEEE Trans. Computers C-25(7), 742–746 (1975)
Bozorgui-Nesbat, S., McCluskey, E.J.: Design for Autonomous Test. IEEE Trans. Computers, 866–875 (November 1981)
McCluskey, E.J., Bozorgui-Nesbat, S.: Design for Autonomous Test. IEEE Trans. Øn Computer C-30(11), 866–875 (1981)
Udell Jr., J.G., McCluskey, E.J.: Efficient Circuit Segmentation for Pseudoexhaustive Test. In: Proc. Int. Conf. on Computer-Aided Design, pp. 148–151 (1987)
Udell: Test pattern generation for pseudo- exhaustive BIST, CRC Tech. Report, Stanford Univ.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2005 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Noh, J.S., Park, C.G., Rhee, KH. (2005). Path Sensitization and Sub-circuit Partition of CUT Using t-Distribution for Pseudo-exhaustive Testing. In: Baik, DK. (eds) Systems Modeling and Simulation: Theory and Applications. AsiaSim 2004. Lecture Notes in Computer Science(), vol 3398. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-30585-9_23
Download citation
DOI: https://doi.org/10.1007/978-3-540-30585-9_23
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-24477-6
Online ISBN: 978-3-540-30585-9
eBook Packages: Computer ScienceComputer Science (R0)