Abstract
Advance Video Coding standard (AVS) [1] is the standard for compression and decompression in digital audio and video multimedia. The AVS Working Group was approved by the Science and Technology Department of Ministry of Information Industry of china on June 2002. AVS has employed a 4-tap interpolation FIR filter in its motion compensation (MC) part for high coding efficiency. But it is accompanied by increasing the complexity in calculation and memory access. And this problem makes MC one of the bottlenecks in the AVS system’s VLSI implementation, especially for SDTV or HDTV which aggravate the problem heavily. Unfortunately, most FIR filter [3-5] have too low of input bandwidth to deal with it. In this paper, an efficient architecture for MC interpolation is described, and experimental results show that this architecture satisfies AVS decoder applications such as SDTV or HDTV.
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References
vos, L., Stegherr, M.: Parameterizable VLSI Architectures for the full-search Block-Matching Algorithm. IEEE Transactions on Circuits and Systems 36(10), 1309–1316 (1989)
Park, J., Muhammad, K., Roy, K.: High Performance FIR Filter Design Based on Sharing Multiplication. IEEE Transactions on VLSI Systems (TVLSI) 11(2), 244–253 (2003)
Samueli, H.: On the design of optimal equiripple FIR digital filters for data transmission applications. IEEE Trans. Circuits Syst. 35, 1542–1546 (1988)
Sankarayya, N., Roy, K., Bhattacharya, D.: Algorithms for low power and high speed FIR filter realization using differential coefficients. IEEE Trans. Circuits Syst. 44, 488–497 (1997)
JVT:ISO/IEC and ITU-T: Draft ITU-T Recommendation and Final Draft international Standard of Joint Video Specification. Doc.JVT-G050r1, Geneva, Switzerland (May 2003)
Roma, N., Sousa, L.: A New Efficient VLSI Architecture for Full Search Block Matching Motion Estimation. In: VLSI-SOC, Montpellier, France, pp. 253–264 (2001)
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© 2004 Springer-Verlag Berlin Heidelberg
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Deng, L., Gao, W., Hu, MZ., Ji, ZZ. (2004). An Efficient VLSI Implementation for MC Interpolation of AVS Standard. In: Aizawa, K., Nakamura, Y., Satoh, S. (eds) Advances in Multimedia Information Processing - PCM 2004. PCM 2004. Lecture Notes in Computer Science, vol 3333. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-30543-9_26
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DOI: https://doi.org/10.1007/978-3-540-30543-9_26
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-23985-7
Online ISBN: 978-3-540-30543-9
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