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Design and Evaluation of a Symbolic and Abstraction-Based Model Checker

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Book cover Automated Technology for Verification and Analysis (ATVA 2004)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 3299))

Abstract

Symbolic model-checking usually includes two steps: the building of a compact representation of a state graph and the evaluation of the properties of the system upon this data structure. In case of properties expressed with a linear time logic, it appears that the second step is often more time consuming than the first one. In this work, we present a mixed solution which builds an observation graph represented in a non symbolic way but where the nodes are essentially symbolic set of states. Due to the small number of events to be observed in a typical formula, this graph has a very moderate size and thus the complexity time of verification is neglectible w.r.t. the time to build the observation graph. Thus we propose different symbolic implementations for the construction of the nodes of this graph. The evaluations we have done on standard examples show that our method outperforms the pure symbolic methods which makes it attractive.

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Haddad, S., Ilié, JM., Klai, K. (2004). Design and Evaluation of a Symbolic and Abstraction-Based Model Checker. In: Wang, F. (eds) Automated Technology for Verification and Analysis. ATVA 2004. Lecture Notes in Computer Science, vol 3299. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-30476-0_19

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  • DOI: https://doi.org/10.1007/978-3-540-30476-0_19

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-23610-8

  • Online ISBN: 978-3-540-30476-0

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