Abstract
This paper presents an efficient graph-based evolutionary optimization technique called Evolutionary Graph Generation (EGG), and its application to the topology-oriented design of analog circuit structures. An important feature of EGG is its capability to optimize general graph structures directly instead of encoding the structures into indirect representations, such as bit strings and trees. The potential of the proposed approach is demonstrated through the experimental design of MOS current mirrors.
Keywords
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Aoki, T., Homma, N., Higuchi, T.: Evolutionary design of arithmetic circuits. IEICE Trans. Fundamentals E82-A(5), 798–806 (1999)
Homma, N., Aoki, T., Higuchi, T.: Evolutionary synthesis of fast constantcoefficient multipliers. IEICE Trans. Fundamentals E83-A(9), 1767–1777 (2000)
Homma, N., Aoki, T., Higuchi, T.: Evolutionary graph generation system with transmigration capability and its application to arithmetic circuit synthesis. In: IEE Proc. Circuits Devices Syst., vol. 149(2), pp. 97–104 (2002)
Miller, F.J., Thomson, P., Fogarty, T.: Designing electronic circuits using evolutionary algorithms. Arithmetic circuits: A case study. In: Genetic Algorithms and Evolution Strategies in Engineering and Computer Science, pp. 105–131 (September 1997)
Koza, R.J., III, H.F., Bennett, D.A., Keane, A.M., Dunlap, F.: Automated synthesis of analog electrical circuits by means of genetic programming. IEEE Trans. Evolutionary Computation 1(2), 109–128 (1997)
Motegi, M., Homma, N., Aoki, T., Higuchi, T.: Evolutionary graph generation system and its application to bit-serial arithmetic circuit synthesis. In: Guervós, J.J.M., Adamidis, P.A., Beyer, H.-G., Fernández-Villacañas, J.-L., Schwefel, H.-P. (eds.) PPSN 2002. LNCS, vol. 2439, pp. 831–840. Springer, Heidelberg (2002)
Lohn, D.J., Colombano, S.P.: A circuit representation technique for automated circuit design. IEEE Trans. Evolutionary Computation 3(3), 205–219 (1999)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2004 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Natsui, M., Homma, N., Aoki, T., Higuchi, T. (2004). Topology-Oriented Design of Analog Circuits Based on Evolutionary Graph Generation. In: Yao, X., et al. Parallel Problem Solving from Nature - PPSN VIII. PPSN 2004. Lecture Notes in Computer Science, vol 3242. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-30217-9_35
Download citation
DOI: https://doi.org/10.1007/978-3-540-30217-9_35
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-23092-2
Online ISBN: 978-3-540-30217-9
eBook Packages: Springer Book Archive