Abstract
In this paper, we present an efficient method to simultaneously size wire widths and decoupling capacitance (decaps) areas for optimizing power/ ground (P/G) networks modeled as RLC linear networks subject to reliability constraints. We formulate the problem as a nonlinear optimization problem and propose an efficient gradient-based non-linear programming method for searching the solution. We apply a time-domain merged adjoint network to efficiently compute the gradients and a novel equivalent circuit modeling technique to speed up the optimization process. The resulting algorithm is very efficient and experimental results show that the new algorithm is capable of optimizing P/G networks modeled as RLC networks with million nodes within 10 hours in modern workstations.
This work was supported by National Natural Science Foundation of China (NSFC) 90307017, 60176016 and 60121120706 and National Natural Science Foundation of USA (NSF) CCR-0096383.
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Fu, J., Luo, Z., Hong, X., Cai, Y., Tan, S.X.D., Pan, Z. (2004). Simultaneous Wire Sizing and Decoupling Capacitance Budgeting for Robust On-Chip Power Delivery. In: Macii, E., Paliouras, V., Koufopavlou, O. (eds) Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2004. Lecture Notes in Computer Science, vol 3254. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-30205-6_45
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DOI: https://doi.org/10.1007/978-3-540-30205-6_45
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