Dynamic Mapping and Ordering Tasks of Embedded Real-Time Systems on Multiprocessor Platforms

Abstract

Tradeoff exploration can be found in several different areas of embedded system design. One example is task scheduling, where different task mapping and ordering choices for a target platform will lead to different performance/cost tradeoffs, which can be represented in a so-called Pareto curve. Though many scheduling algorithms have been suggested, on-line or off-line, few have been really implemented on a real platform, especially on an embedded multi-processor one. We have implemented a middleware layer to handle that problem and we have integrated a hierarchical task scheduler into it. It is compatible with most current RTOS implementations as long as they have a well defined API for task activation and synchronization. A simple DCT example demonstrates that the extra overhead is acceptable low. With a real-life test case from H.263, we demonstrate how big an impact our approach can cause. The deadline miss rate is dramatically reduced since we map and order the tasks at run-time. When voltage scaling is considered, we can save 10% more energy compared to the state-of-the-art solution. Moreover, this integration enables a novel design methodology flow, which allows further design space exploration and optimization at run time.