Abstract
In this paper we present a new approach for generating high-speed optimized event-driven register transfer level (RTL) compiled simulators. The generation of the simulators is part of our BUILDABONG [7] framework, which aims at architecture and compiler co-generation for special purpose processors. The main focus of the paper is on the transformation of a given architecture’s circuit into a graph and applying on it an essential graph decomposition algorithm to transform the graph into subgraphs denoting the minimal subsets of sequential elements which have to be reevaluated during each simulation cycle. As a second optimization, we present a partitioning algorithm, which introduces intermediate registers to minimize the number of evaluations of combinational nodes during a simulation cycle. The simulator’s superior performance compared to an existing commercial simulator is shown. Finally, we demonstrate the pertinence of our approach by simulating a MIPS processor.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Mips homepage, http://mips.com/
Synopsys homepage, http://synopsys.com/
Axys design automation, http://www.axysdesign.com
Daniel, J.Z.: A retargetable, ultra-fast instruction set simulator. In: Proceedings on the European Design and Test Conference (1999)
Sentovich, K.S.E., et al.: Sis: A system for sequential circuit synthesis. In: Technical Report UCB/ERL M92/41. University of California, Berkeley (May 1992)
Fischer, D., Teich, J., Thies, M., Weper, R.: Efficient architecture/compiler co-exploration for asips. In: ACM SIG Proceedings International Conference on Compilers, Architectures and Synthesis for Embedded Systems (CASES 2002), Grenoble, France, pp. 27–34 (2002)
Fischer, D., Teich, J., Thies, M., Weper, R.: BUILDABONG: A framework for architecture/ compiler co-exploration for ASIPs. Journal for Circuits, Systems, and Computers, Special Issue: Application Specific Hardware Design, 353–375 (2003)
Granlund, T.: The GNU multiple precision library, edn. 2.0.2. Technical report, TMG Datakonsult, Sodermannagatan 5, 11623 Stockholm, Sweden (1996)
Leupers, R.: Retargetable Code Generation for Digital Signal Processors. Kluwer Academic Publishers, Dordrecht (1997)
Pees, S., Hoffmann, A., Meyr, H.: Retargeting of compiled simulators for digital signal processors using a machine description language. In: Proceedings Design Automation and Test in Europe (DATE 2000), Paris (March 2000)
Schnarr, E., Larus, J.R.: Fast out-of-order processor simulation using memorization. In: Proceedings of the eighth international conference on Architectural support for programming languages and operating systems, pp. 283–294 (1998)
Teich, J., Kutter, P., Weper, R.: Description and simulation of microprocessor instruction sets using asms. In: Gurevich, Y., Kutter, P.W., Odersky, M., Thiele, L. (eds.) ASM 2000. LNCS, vol. 1912, pp. 266–286. Springer, Heidelberg (2000)
Wang, L.-T., Hoover, N.E., Porter, E.H., Zasio, J.J.: SSIM: A software levelized compiledcode simulator, 2–8
Witchel, E., Rosenblum, M.: Embra: Fast and flexible machine simulation. In: Measurement and Modeling of Computer Systems , 68–79 (1996)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2004 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Kupriyanov, A., Hannig, F., Teich, J. (2004). High-Speed Event-Driven RTL Compiled Simulation. In: Pimentel, A.D., Vassiliadis, S. (eds) Computer Systems: Architectures, Modeling, and Simulation. SAMOS 2004. Lecture Notes in Computer Science, vol 3133. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-27776-7_53
Download citation
DOI: https://doi.org/10.1007/978-3-540-27776-7_53
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-22377-1
Online ISBN: 978-3-540-27776-7
eBook Packages: Springer Book Archive