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Modeling Instruction Semantics in ADL Processor Descriptions for C Compiler Retargeting

  • Jianjiang Ceng
  • Weihua Sheng
  • Manuel Hohenauer
  • Rainer Leupers
  • Gerd Ascheid
  • Heinrich Meyr
  • Gunnar Braun
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 3133)

Abstract

Today’s Application Specific Instruction-set Processor (ASIP) design methodology often employs centralized Architecture Description Language (ADL) processor models, from which software tools, such as C compiler, assembler, linker, and instruction-set simulator, can be automatically generated. Among these tools, the C compiler is becoming more and more important. However, the generation of C compilers requires high-level architecture information rather than low-level details needed by simulator generation. This makes it particularly difficult to include different aspects of the target architecture into one single model, and meanwhile keeping consistency.

This paper presents a modeling style, which is able to capture high- and low-level architectural information at the same time and drives both the C compiler and the simulator generation without sacrificing the modeling flexibility. The proposed approach has been successfully applied to model a number of contemporary, real-world processor architectures.

Keywords

Simulator Generation Modeling Style Architecture Description Language Design Automation Conference Processor Model 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2004

Authors and Affiliations

  • Jianjiang Ceng
    • 1
  • Weihua Sheng
    • 1
  • Manuel Hohenauer
    • 1
  • Rainer Leupers
    • 1
  • Gerd Ascheid
    • 1
  • Heinrich Meyr
    • 1
  • Gunnar Braun
    • 2
  1. 1.Integrated Signal Processing SystemsAachen University of Technology (RWTH)AachenGermany
  2. 2.CoWare, Inc.AachenGermany

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