Abstract
We present new results concerning the integration of high level designed ips into a complete System on Chip. We first introduce a new computation model that can be used for cycle accurate simulation of register transfer level synthesized hardware. Then we provide simulation of a SoC integrating a data-flow ip synthesized with MMAlpha and the SocLib cycle accurate simulation environment. This integration also validates an efficient generic interface mechanism for data-flow ips.
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References
Alliance, V.: Virtual component interface standard (ocb specification 2, version 1.0) (2000)
Pétrot, F., Hommais, D., Greiner, A.: A simulation environment for core based embedded systems. In: Annual Simulation Symposium, Atlanta, GA, U.S.A, pp.86–91 (1997)
Guillou, A.C., Quinton, P., Risset, T., Wagner, C., Massicotte, D.: High level design of digital filters in mobile communications. Technical Report 1405, Irisa (2001)
Sentieys, O., Diguet, J., Philippe, J.: Gaut: a high level synthesis tool dedicated to real time signal processing application. In: EURO-DAC, University booth stand (2000)
Bednara, M., Teich, J.: Interface synthesis for fpga based vlsi processor arrays. In: Proc. of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA 02), Las Vegas, Nevada, U.S.A (2002)
Kienhuis, B., Rijpkema, E., Deprettere, E.: Compaan: Deriving process networks from matlab for embedded signal processing architectures. In: 8th International Workshop on Hardware/Software Codesign, CODES 2000 (2000)
Augé, I., Donnet, F., Gomez, P., Hommais, D., Pétrot, F.: Disydent: a pragmatic approach to the design of embedded systems. In: Design, Automation and Test in Europe Conference and Exhibition (DATE 2003 Designers’ Forum), Paris, France (2002)
Schreiber, R., et al.: High-Level Synthesis of Non Programmable Hardware Accelerators. In: IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2000), Boston (2000)
Hounsell, B., Taylor, R.: Co-processor synthesis a new methodology for embedded software acceleration. In: Design, Automation and Test in Europe Conference and Exhibition (DATE 2003 Designers’ Forum), Paris, France (2004)
Derrien, S., Guillou, A.C., Quinton, P., Risset, T., Wagner, C.: Automatic synthesis of efficient interfaces for compiled regular. In: Internationnal Samos Workshop on Systems, Architectures, Modeling and Simulation (Samos), Samos, Grece (2002)
Jennings, G.: A case against event-driven simulation for digital system design. In: Proceedings of the 24th annual symposium on Simulation, IEEE Computer Society Press, pp.170–176 (1991)
Fraboulet, A., Risset, T., Scherrer, A.: Cycle accurate simulation model generation for soc prototyping. Technical Report 2004-18, LIP (2004)
Naresh, R.S., Keshab, K.P.: Pipelined Adaptative DFE Architecture Using Relaxed Look-Ahead. IEEE Transactions on Signal Processing 43, 1368–1385 (1995)
Pétrot, F., Gomez, P.: Lightweight implementation of the posix threads api for an on-chip mips multiprocessor with vci interconnect. In: Design, Automation and Test in Europe Conference and Exhibition (DATE 2003 Designers’ Forum), Munich, Germany (2003)
Charot, F., Nyamsi, M., Quinton, P., Wagner, C.: Architecture Exploration for 3G Telephony Applications Using a Hardware–Software Prototyping Platform. In: Proc. of Samos IV, Samos, Greece (2004)
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Fraboulet, A., Risset, T., Scherrer, A. (2004). Cycle Accurate Simulation Model Generation for SoC Prototyping. In: Pimentel, A.D., Vassiliadis, S. (eds) Computer Systems: Architectures, Modeling, and Simulation. SAMOS 2004. Lecture Notes in Computer Science, vol 3133. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-27776-7_47
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DOI: https://doi.org/10.1007/978-3-540-27776-7_47
Publisher Name: Springer, Berlin, Heidelberg
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