Abstract
To answer new challenges, systems on chip need to gain flexibility and fpgas need to gain structure. We propose a general framework for SoC architectures and software tools in which different kind of processing units are programmed at high level. We show a reconfigurable unit suitable for this framework and we draw the outline of a super-compiler able to address such an architecture.
Thanks due to research programs from STSI, RNTL and CNRS/STIC POMARD
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Cambonie, J. et al. (2004). Compiler and System Techniques for soc Distributed Reconfigurable Accelerators. In: Pimentel, A.D., Vassiliadis, S. (eds) Computer Systems: Architectures, Modeling, and Simulation. SAMOS 2004. Lecture Notes in Computer Science, vol 3133. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-27776-7_31
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DOI: https://doi.org/10.1007/978-3-540-27776-7_31
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