Abstract
Techniques for the rapid deployment and architectural exploration of complex digital signal processing algorithms on embedded processor platforms are gaining popularity. These become significantly more complicated when dedicated hardware components need to be integrated. The models on which such design methodologies and tools are based highlight the system level inflexibility with both pre-designed intellectual property cores and most customized component creation techniques. This paper presents a technique for overcoming these deficiencies using a dataflow model of computation, by allowing flexible circuit architectures to be created that can be optimized as desired, providing increased throughput with no extra resource usage in some situations.
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© 2004 Springer-Verlag Berlin Heidelberg
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Mc Allister, J., Woods, R., Walke, R. (2004). Embedded Context Aware Hardware Component Generation for Dataflow System Exploration. In: Pimentel, A.D., Vassiliadis, S. (eds) Computer Systems: Architectures, Modeling, and Simulation. SAMOS 2004. Lecture Notes in Computer Science, vol 3133. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-27776-7_27
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DOI: https://doi.org/10.1007/978-3-540-27776-7_27
Publisher Name: Springer, Berlin, Heidelberg
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