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Virtual Architecture Mapping: A SystemC Based Methodology for Architectural Exploration of System-on-Chip Designs

  • Tim Kogel
  • Malte Doerper
  • Torsten Kempf
  • Andreas Wieferink
  • Rainer Leupers
  • Gerd Ascheid
  • Heinrich Meyr
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 3133)

Abstract

The ever increasing complexity and heterogeneity of modern System-on-Chip designs demands early consideration and exploration of architectural alternatives, which is hardly practicable on the low abstraction level of implementation models.

In this paper, a system level design methodology based on the SystemC 2.0.1 library is proposed, which enables the designer to reason about the architecture on a much higher level of abstraction. Goal of this methodology is to define a system architecture, which provides sufficient performance, flexibility and cost efficiency as required by demanding applications like broadband networking or wireless communications. The methodology also provides capabilities for co-simulating multiple levels of abstraction simultaneously. This enables reuse of the simulation environment for functional verification of synthesizable implementation models against the abstract architecture model.

During a industrial case study, this methodology is applied to the development of a 2.5 GB IP forwarding chip with Quality-of-Service (QoS) support. In this paper we share our experiences with special emphasis on the architecture exploration phase, where several architectural alternatives are evaluated with respect to their impact on the system performance.

Keywords

Time Division Multiple Access Register Transfer Level Random Early Detection Abstract Data Type System Level Design 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2004

Authors and Affiliations

  • Tim Kogel
    • 1
  • Malte Doerper
    • 2
  • Torsten Kempf
    • 2
  • Andreas Wieferink
    • 2
  • Rainer Leupers
    • 2
  • Gerd Ascheid
    • 2
  • Heinrich Meyr
    • 2
  1. 1.CoWare Inc. 
  2. 2.Integrated Signal Processing SystemsAachen University of TechnologyGermany

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