Abstract
To be able to evolve digital circuits with complex structure and/or complex functionality we propose an artificial development process as the genotype-phenotype mapping. To realistically evolve such circuits a hardware implementation of the development process together with high-speed reconfiguration logic for phenotype implementation is presented. The hardware implementation of the development process is a programmable reconfiguration processor. The high-speed reconfiguration logic for evaluation of the phenotype is capable of exploiting the advantage of massive parallel processing due to the cellular automata like structure.
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Kitano, H.: Building complex systems using development process: An engineering approach. In: Sipper, M., Mange, D., Pérez-Uribe, A. (eds.) ICES 1998. LNCS, vol. 1478, pp. 218–229. Springer, Heidelberg (1998)
Bentley, P.J., Kumar, S.: Three ways to grow designs: A comparison of embryogenies for an evolutionary design problem. In: Genetic and Evolutionary Computation Conference (GECCO 1999), pp. 35–43 (1999)
Gordon, T.G.W., Bentley, P.J.: Towards development in evolvable hardware. In: The 2002 NASA/DOD Conference on Evolvable Hardware (EH 2002), pp. 241–250 (2002)
Miller, J.F., Thomson, P.: A developmental method for growing graphs and circuits. In: Tyrrell, A.M., Haddow, P.C., Torresen, J. (eds.) ICES 2003. LNCS, vol. 2606, pp. 93–104. Springer, Heidelberg (2003)
Tufte, G., Haddow, P.C.: Identification of functionality during development on a virtual sblock fpga. In: Congress on Evolutionary Computation (2003)
Nallatech: BenERA User Guide. Nt107-0072 (issue 3) 09-04-2002 edn. (2002)
Xilinx: Xilinx Virtex-E 1.8 V Field Programmable Gate Arrays Production Product Specification. Ds022-1 (v2.3) July 17, 2002 edn. (2002)
Haddow, P.C., Tufte, G.: Bridging the genotype-phenotype mapping for digital FPGAs. In: The 3rd NASA/DoD Workshop on Evolvable Hardware, pp. 109–115 (2001)
Mitchell, M., Hraber, P.T., Crutchfield, J.P.: Revisiting the egde of chaos: Evolving cellular automata to perform computations. Complex Systems 7, 89–130 (1993) (Santa Fe Institute Working Paper 93-03-014)
van Remortel, P., Lenaerts, T., Manderick, B.: Lineage and induction in the Development of evolved genotypes for non-uniform 2d cas. In: 15th Australian Joint Conference on Artificial Intelligence, pp. 321–332 (2002)
Haddow, P.C., Tufte, G., van Remortel, P.: Evolvable hardware: pumping life into dead silicon. In: Kumar, S. (ed.) On Growth, Form and Computers, pp. 404–422. Elsevier Limited, Oxford (2003)
Xilinx: Xilinx XAPP 151 Virtex Configuration Architecture Advanced Users’ Guide. 1.1 edn. (1999)
Tufte, G., Haddow, P.C.: Building knowledg into developmental rules for circuite design. In: Tyrrell, A.M., Haddow, P.C., Torresen, J. (eds.) ICES 2003. LNCS, vol. 2606, pp. 69–80. Springer, Heidelberg (2003)
Djupdal, A.: Design and Implementation of Hardware Suitable for Sblock Based Experiments, Masters Thesis. The University of Science and technology, Norway (2003)
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Tufte, G., Haddow, P.C. (2004). Biologically-Inspired: A Rule-Based Self-Reconfiguration of a Virtex Chip. In: Bubak, M., van Albada, G.D., Sloot, P.M.A., Dongarra, J. (eds) Computational Science - ICCS 2004. ICCS 2004. Lecture Notes in Computer Science, vol 3038. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-24688-6_161
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DOI: https://doi.org/10.1007/978-3-540-24688-6_161
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