Abstract
Sedlak’s [Sed] modular multiplication algorithm is one of the first real silicon implementations to speed up the RSA signature generation [RSA] on a smartcard, cf. [DQ]. Theoretically, Sedlak’s algorithm needs on average n/3 steps (i.e., additions/subtractions) to compute the modular product of n-bit numbers. In [FS2] we presented a theoretical algorithm how to speed up Sedlak’s algorithm by an arbitrary integral factor i ≥ 2, i.e., our new algorithm needs on average n/(3 · i) steps in order to compute the modular product of n-bit numbers. As an extension of [FS2] the present paper will show how this theoretical framework can be turned into a practical implementation.
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Fischer, W., Seifert, JP. (2004). High-Speed Modular Multiplication. In: Okamoto, T. (eds) Topics in Cryptology – CT-RSA 2004. CT-RSA 2004. Lecture Notes in Computer Science, vol 2964. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-24660-2_21
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DOI: https://doi.org/10.1007/978-3-540-24660-2_21
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