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High-Speed Modular Multiplication

  • Wieland Fischer
  • Jean-Pierre Seifert
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2964)

Abstract

Sedlak’s [Sed] modular multiplication algorithm is one of the first real silicon implementations to speed up the RSA signature generation [RSA] on a smartcard, cf. [DQ]. Theoretically, Sedlak’s algorithm needs on average n/3 steps (i.e., additions/subtractions) to compute the modular product of n-bit numbers. In [FS2] we presented a theoretical algorithm how to speed up Sedlak’s algorithm by an arbitrary integral factor i ≥ 2, i.e., our new algorithm needs on average n/(3 · i) steps in order to compute the modular product of n-bit numbers. As an extension of [FS2] the present paper will show how this theoretical framework can be turned into a practical implementation.

Keywords

Booth recoding Computer arithmetic Implementation issues Sedlak’s algorithm Modular multiplication 

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Copyright information

© Springer-Verlag Berlin Heidelberg 2004

Authors and Affiliations

  • Wieland Fischer
    • 1
  • Jean-Pierre Seifert
    • 1
  1. 1.Infineon Technologies, Secure Mobile SolutionsMunichGermany

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