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Flexible Hardware Design for RSA and Elliptic Curve Cryptosystems

  • Lejla Batina
  • Geeke Bruin-Muurling
  • Sıddıka Berna Örs
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2964)

Abstract

This paper presents a scalable hardware implementation of both commonly used public key cryptosystems, RSA and Elliptic Curve Cryptosystem (ECC) on the same platform. The introduced hardware accelerator features a design which can be varied from very small (less than 20 Kgates) targeting wireless applications, up to a very big design (more than 100 Kgates) used for network security. In latter option it can include a few dedicated large number arithmetic units each of which is a systolic array performing the Montgomery Modular Multiplication (MMM). The bound on the Montgomery parameter has been optimized to facilitate more secure ECC point operations. Furthermore, we present a new possibility for CRT scheme which is less vulnerable to side-channel attacks.

Keywords

FPGA design Systolic array Hardware implementation RSA ECC Montgomery multiplication Side-channel attacks 

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Copyright information

© Springer-Verlag Berlin Heidelberg 2004

Authors and Affiliations

  • Lejla Batina
    • 1
  • Geeke Bruin-Muurling
    • 2
  • Sıddıka Berna Örs
    • 1
  1. 1.Katholieke Universiteit Leuven, ESAT/COSICLeuven-HeverleeBelgium
  2. 2. VughtThe Netherlands

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