FV-MSB: A Scheme for Reducing Transition Activity on Data Buses

  • Dinesh C. Suresh
  • Jun Yang
  • Chuanjun Zhang
  • Banit Agrawal
  • Walid Najjar
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2913)


Power consumption becomes an important issue for modern processors. The off-chip buses consume considerable amount of total power [9,7]. One effective way to reduce power is to reduce the overall bus switching activities since they are proportional to the power. Up till now, the most effective technique in reducing the switching activities on the data buses is Frequent Value Encoding (FVE) that exploits abundant frequent value locality on the off-chip data buses. In this paper, we propose a technique that exploits more value locality that was overlooked by the FVE. We found that a significant amount of non-frequent values, not captured by the FVE, share common high-ordered bits. Therefore, we propose to extend the current FVE scheme to take bit-wise frequent values into consideration. On average, our technique reduces 48% switching activity. The average energy saving we achieved is 44.8%, which is 8% better than the FVE.


Switching Activity Very Large Scale Integration Normal Program Content Addressable Memory Average Energy Saving 
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Copyright information

© Springer-Verlag Berlin Heidelberg 2003

Authors and Affiliations

  • Dinesh C. Suresh
    • 1
  • Jun Yang
    • 1
  • Chuanjun Zhang
    • 2
  • Banit Agrawal
    • 1
  • Walid Najjar
    • 1
  1. 1.Computer Science and Engineering DepartmentUniversity of CaliforniaRiversideUSA
  2. 2.Electrical Engineering DepartmentUniversity of CaliforniaRiversideUSA

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