Timing Issues of Operating Mode Switch in High Performance Reconfigurable Architectures

  • Rama Sangireddy
  • Huesung Kim
  • Arun K. Somani
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2913)


The concept of a reconfigurable coprocessor controlled by the general purpose processor, with the coprocessor acting as a specialized functional unit, has evolved to accelerate applications requiring higher computing power. The idea of Adaptive Balanced Computing (ABC) architecture has evolved, where a module of Reconfigurable Functional Cache (RFC) is configured with a selective core function in the application whenever a higher computing resources are required. Initial results have proved that the ABC architecture provides with speedups ranging from 1.04x to 5.0x depending on the application and the speedups in the range of 2.61x to 27.4x are observed for the core functions. This paper further explores the issues of management of RFC, where the impact of various schemes for configuration of core function into the RFC module is studied. This paper also gives a detailed analysis on the performance of ABC architecture for various configuration schemes, including the study of the effect of the percentage of the core function in an entire application over the management of RFC modules.


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Copyright information

© Springer-Verlag Berlin Heidelberg 2003

Authors and Affiliations

  • Rama Sangireddy
    • 1
  • Huesung Kim
    • 1
  • Arun K. Somani
    • 1
  1. 1.Dependable Computing & Networking Laboratory, Department of Electrical and Computer EngineeringIowa State UniversityAmesUSA

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