The High Performance Microprocessor in the Year 2013: What Will It Look Like? What It Won’t Look Like?
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Moore’s Law promises more than one billion transistors on a chip processing at more than 10 GHz. Is there anything left to do in the microarchitecture to make use of all this capability, or should we fold our tents and go home? I have given talks with this theme for the past fifteen years. The theme remains the same, brought on by the naysayers who proclaim we have reached the end of our rope. But the details continue to change. Progress in process technology requires updating what is available on the chip. And microarchitecture ingenuity provides new avenues to exploit the increase in on-chip resources. Yesterday’s news is today’s old hat, but there is still plenty we can do. In this talk, I will spend a little time discussing the rational of the naysayers, and then move on to what I think we will see in the microprocessor of the year 2013, including the block-structured ISA, stronger use of SSMT, greater use of microcode, dedicated infrequently used functional units, and most importantly, a stronger coupling with the compiler and algorithm technologies. If time permits, I will discuss some things I do not think we will see on the chip, like qbits and machines that think.