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Parallelität auf Block- und Instruktionsebene

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Parallelrechner

Part of the book series: Leitfäden der Informatik ((XLINF))

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Zusammenfassung

In den letzten Jahren fand auf dem Gebiet der Rechnerarchitekturen eine bemerkenswerte Entwicklung statt. Insbesondere die Leistungsfähigkeit von Prozessoren hat sich drastisch erhöht. Maßgeblich hierfür ist zum einen die Einführung neuer Konzepte, z.B. RISC-Prozessoren [12, 38], zum anderen aber auch die Verbesserung der Technologie und die damit verbundene Erhöhung der Taktfrequenz. Abbildung 5.1 zeigt diese Entwicklung für Mikroprozessoren. Aus dieser Darstellung wird klar, daß der Anstieg der Komplexität in den letzten Jahren allmählich nachgelassen hat. Eine weitere Steigerung der Leistungsfähigkeit wird demnach in absehbarer Zeit nur noch durch neue Konzepte denkbar sein. Eines der vielversprechendsten Konzepte und heute schon wichtigsten Forschungsgebiete kann in der Weiterentwicklung der Parallelverarbeitung gesehen werden. Dieses Kapitel behandelt vor allem die Parallelität auf Mikrobefehlsebene, Instruktionsebene und Blockebene.

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Authors
  1. Wolfgang Rosenstiel
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  2. Jörg Wedeck
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Editors and Affiliations

  1. Univ. Frankfurt/Main, Deutschland

    Klaus Waldschmidt

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© 1995 B. G. Teubner Stuttgart

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Rosenstiel, W., Wedeck, J. (1995). Parallelität auf Block- und Instruktionsebene. In: Waldschmidt, K. (eds) Parallelrechner. Leitfäden der Informatik. Vieweg+Teubner Verlag. https://doi.org/10.1007/978-3-322-86771-1_5

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  • DOI: https://doi.org/10.1007/978-3-322-86771-1_5

  • Publisher Name: Vieweg+Teubner Verlag

  • Print ISBN: 978-3-519-02135-3

  • Online ISBN: 978-3-322-86771-1

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