Skip to main content

Part of the book series: Advances in Intelligent Systems and Computing ((AISC,volume 852))

Abstract

The paper includes a proposal of a new model of synthesis multiprocessors systems with higher degree of reliability. Optimal task scheduling and optimal partition at resources are basic problems in high-level synthesis of computer systems. Concept of reliability is a system idea that integrates hardware and software. Reliability is a feature of the system, which reflects the degree of user’s dependency to the system and is reflected in the continuity of actions of the equipment and installed programs. Achieving a higher degree of reliability of the system is implemented during the system operation, which limits damage caused by failures. This implementation is manifested by introducing internal control into the system, diagnostic of damaged components and using redundant modules, which allows tolerance of damage, achievement of the ability to soft fall and survival of the system. Concurrent, coherent and computer aided synthesis may have a practical application in developing tools for rapid prototyping of such systems.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 169.00
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 219.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

References

  1. Drabowski, M.: Modification of concurrent design of hardware and software for embedded systems – a synergistic approach. In: Grzech, A., Świątek, J., Wilimowska, Z., Borzemski, L. (eds.) Information Systems Architecture and Technology: Proceedings of 37th International Conference on Information Systems Architecture and Technology – ISAT 2016, vol. 522, pp. 3–13. Springer, Heidelberg (2016)

    Google Scholar 

  2. Błażewicz, J., Drabowski, M., Węglarz, J.: Scheduling multiprocessor tasks to minimize schedule length. IEEE Trans. Comput. C-35(5), 389–393 (1986)

    Google Scholar 

  3. Garey, M., Johnson, D.: Computers and Intractability: A Guide to the Theory of NP-Completeness. Freeman, San Francisco (1979)

    MATH  Google Scholar 

  4. Dorigo, M., Di Caro, G., Gambardella, L.M.: An algorithms for discrete optimization. Artif. Life 5(2), 137–172 (1999)

    Article  Google Scholar 

  5. Drabowski, M., Kiełkowicz, K.: A hybrid genetic algorithm for hardware–software synthesis of heterogeneous parallel embedded systems. In: Świątek, J., Borzemski, L., Wilimowska, Z. (eds.) Information Systems Architecture and Technology: Proceedings of 38th International Conference on Information Systems Architecture and Technology – ISAT 2017, vol. 656, pp. 331–343. Springer, Heidelberg (2017)

    Google Scholar 

  6. Drabowski, M.: Parallel synthesis of computer systems. Monographs no. 225. AGH Press, Kraków (2011)

    Google Scholar 

  7. Błażewicz, J., Ecker, K., Pesch, E., Schmidt, G., Węglarz, J.: Handbook on Scheduling. Springer, Heidelberg (2007)

    MATH  Google Scholar 

  8. Drozdowski, M.: Scheduling multiprocessor tasks – an overview. Eur. J. Oper. Res. 94, 215–230 (1996)

    Article  Google Scholar 

  9. Drozdowski, M.: Scheduling for Parallel Processing. Springer, London (2009)

    Book  Google Scholar 

  10. Pricopi, M., Mitra, T.: Task scheduling on adaptive multi-core. IEEE Trans. Comput. C-59, 167–173 (2014)

    Google Scholar 

  11. Agraval, T.K., Sahu, A., Ghose, M., Sharma, R.: Scheduling chained multiprocessor tasks onto large multiprocessor system. Computing 99(10), 1007–1028 (2017)

    Article  MathSciNet  Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Mieczysław Drabowski .

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2019 Springer Nature Switzerland AG

About this paper

Check for updates. Verify currency and authenticity via CrossMark

Cite this paper

Drabowski, M. (2019). Concurrent, Coherent Design of Hardware and Software Embedded Systems with Higher Degree of Reliability and Fault Tolerant. In: Borzemski, L., Świątek, J., Wilimowska, Z. (eds) Information Systems Architecture and Technology: Proceedings of 39th International Conference on Information Systems Architecture and Technology – ISAT 2018. ISAT 2018. Advances in Intelligent Systems and Computing, vol 852. Springer, Cham. https://doi.org/10.1007/978-3-319-99981-4_2

Download citation

Publish with us

Policies and ethics