Simulation-Based Signal Selection

Abstract

The single largest obstacle in post-silicon verification is the limited observability of internal signals of a design, as this severely limits our ability to diagnose an observed functional bug. A solution to address this issue leverages trace buffers: these are register buffers embedded into the design, with the goal of recording the value of a small number of state elements. Due to the trace buffer’s area overhead, only a very small fraction of the signals can be traced. Thus, the selection of which signals to trace is of paramount importance in post-silicon debugging and diagnosis. Ideally, we would like to select signals enabling the maximum amount of reconstruction of internal signal values. Several signal selection algorithms for post-silicon debug have been proposed in the literature: the majority of algorithms rely on a state restoration capacity metric, coupled with a greedy algorithm. In this chapter, we explore the possibility of using information gathered from simulation data to create a reliable restoration capability metric. We also analyze the shortcomings of metric-guided greedy algorithm structures and, based on our findings, present an alternative solution. This novel algorithm leverages an iterative metric-guided elimination to hone in a set of signals capable of providing the best state restoration.