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Full-Bridge ZVS-PWM Converter with Capacitive Output Filter

  • Ivo BarbiEmail author
  • Fabiana Pöttker
Chapter
Part of the Power Systems book series (POWSYS)

Abstract

In this chapter, the Full-Bridge Zero-Voltage-Switching Pulse-Width-Modulated (FB-ZVS-PWM) dc-dc converter with capacitive output filter is studied. The chapter presents and describes the principle of operation of the power converter topology, the modulation strategy and the relevant waveforms. A quantitative analysis is provided, focused on obtaining the static gain and output characteristics. Subsequently, the commutation is analyzed and the main equations necessary for designing the commutation parameters are derived. Also included are numerical examples to illustrate the theoretical analysis, proposed exercises with solutions and numerical simulations.

Nomenclature

Vi

Input DC voltage

Vo

Output DC voltage

Po

Output power

Co

Output filter capacitor

Ro

Output load resistor

ZVS

Zero voltage switching

ϕ

Angle between the leading leg and the lagging leg

q

Static gain

D

Duty cycle

fs

Switching frequency

Ts

Switching period

td

Dead time

n

Transformer turns ratio

\( {\text{V}}^{\prime}_{\text{o}} \)

Output DC voltage referred to the transformer primary side

io

Output current

\( {\text{i}}^{\prime}_{\text{o}} \)

Output current referred to the transformer primary side

\( {\text{i}}^{\prime}_{{{\text{o}}\,{\text{C}}}} \)

Output current referred to the primary in CCM

\( {\text{i}}^{\prime}_{{{\text{o}}\,{\text{D}}}} \)

Output current referred to the primary in DCM

\( {\text{I}}^{\prime}_{\text{o}} \)

\( \left( {\overline{{{\text{I}}^{\prime}_{\text{o}} }} } \right) \) average output current referred to the primary and its normalized value

\( {\text{I}}^{\prime}_{{{\text{o}}\,{\text{C}}}} \)

\( {\left( \overline{{{\text{I}}^{\prime}_{{{\text{o}}\;{\text{C}}}} }} \right)} \) average output current in CCM referred to the primary and its normalized value

\( {\text{I}}^{\prime}_{{{\text{o}}\,{\text{D}}}} \)

\( {\left( \overline{{{\text{I}}^{\prime}_{{{\text{o}}\;{\text{D}}}} }} \right)} \) average output current in DCM referred to the primary and its normalized value

\( {\text{I}}^{\prime}_{{{\text{o}}\,{\text{L}}}} \left( {\overline{{{\text{I}}^{\prime}_{{{\text{o}}\,{\text{L}}}} }} } \right) \)

Average output current in the limit (critical conduction mode) between CCM/DCM, referred to the primary winding and its normalized value

S1 and S2

Switches in the leading leg

S3 and S4

Switches in the lagging leg

vg1, vg2, vg3 and vg4

Switches S1, S2, S3 and S4 drive signals, respectively

D1, D2, D3 and D4

Diodes in anti-parallel to the switches (MOSFET—intrinsic diodes)

C1, C2, C3 and C4

Capacitors in parallel to the switches (MOSFET—intrinsic capacitors)

Lc

Transformer leakage inductance or an additional inductor

iLc

Inductor current

ILc

\( \left( {\overline{{{\text{I}}_{\text{Lc}} }} } \right) \) inductor peak current and its normalized value, commutation current for S1 and S3

\( {\text{I}}_{\text{Lc}}\_{\text{C}} \)

\( \left( {\overline{{{\text{I}}_{{{\text{Lc}}\_{\text{C}}}} }} } \right) \) inductor peak current in CCM and its normalized value

\( {\text{I}}_{\text{Lc}}\_{\text{D}} \)

\( \left( {\overline{{{\text{I}}_{{{\text{Lc}}\_{\text{D}}}} }} } \right) \) inductor peak current in DCM and its normalized value

\( \overline{{{\text{I}}_{\text{Lc RMS}} }} \)

Inductor Lc normalized RMS current

\( {{{{\text{I}}_{{{\text{Lc}}\,{\text{RMS}}{\_}{\text{C}}}} }} } \)

\( \left( {\overline{{{\text{I}}_{{{\text{Lc}}\,{\text{RMS}}{\_}{\text{C}}}} }} } \right) \) inductor Lc RMS current in CCM and its normalized value

ILc RMS_D

\( \left( {\overline{{{\text{I}}_{{{\text{Lc}}\,{\text{RMS}}{\_}{\text{D}}}} }} } \right) \) inductor Lc RMS current in DCM and its normalized value

I1

\( \left( {\overline{{{\text{I}}_{1} }} } \right) \) inductor current at the end of the first and fourth step of operation (commutation current for S2 and S4) and its normalized value

vab

Full bridge ac voltage, between points “a” and “b”

vcb

Inductor voltage, between points “c” and “b”

vac

Voltage at the ac side of the rectifier, between points “a” and “c”

vS1, vS2, vS3 and vS4

Voltage across switches

iS1, iS2, iS3 and iS4

Current in the switches

iC1, iC2, iC3 and iC4

Current in the capacitors

∆T

Time interval which vab = ±Vi

∆t1

Time interval of the first step of operation (t1–t0)

∆t2

Time interval of the second step of operation (t2–t1)

∆t3

Time interval of the third step of operation (t3–t2)

∆t4

Time interval of the fourth step of operation (t4–t3)

∆t5

Time interval of the fifth step of operation (t5–t4)

∆t6

Time interval of the sixth step of operation (t6–t5)

A1, A2 and A3

Areas

Reference

  1. 1.
    Barbi, I., Filho, W.A.: A non-resonant zero-voltage switching pulse-width modulated full-bridge DC-to-DC converter. In: IECON, pp. 1051–1056 (1990)Google Scholar

Copyright information

© Springer International Publishing AG, part of Springer Nature 2019

Authors and Affiliations

  1. 1.Federal University of Santa CatarinaFlorianópolisBrazil
  2. 2.Department of ElectronicsFederal University of Technology—ParanáCuritibaBrazil

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