Soft Commutation Isolated DC-DC Converters pp 187-218 | Cite as

# Full-Bridge ZVS-PWM Converter with Capacitive Output Filter

## Abstract

In this chapter, the Full-Bridge Zero-Voltage-Switching Pulse-Width-Modulated (FB-ZVS-PWM) dc-dc converter with capacitive output filter is studied. The chapter presents and describes the principle of operation of the power converter topology, the modulation strategy and the relevant waveforms. A quantitative analysis is provided, focused on obtaining the static gain and output characteristics. Subsequently, the commutation is analyzed and the main equations necessary for designing the commutation parameters are derived. Also included are numerical examples to illustrate the theoretical analysis, proposed exercises with solutions and numerical simulations.

## Nomenclature

- V
_{i} Input DC voltage

- V
_{o} Output DC voltage

- P
_{o} Output power

- C
_{o} Output filter capacitor

- R
_{o} Output load resistor

- ZVS
Zero voltage switching

- ϕ
Angle between the leading leg and the lagging leg

- q
Static gain

- D
Duty cycle

- f
_{s} Switching frequency

- T
_{s} Switching period

- t
_{d} Dead time

- n
Transformer turns ratio

- \( {\text{V}}^{\prime}_{\text{o}} \)
Output DC voltage referred to the transformer primary side

- i
_{o} Output current

- \( {\text{i}}^{\prime}_{\text{o}} \)
Output current referred to the transformer primary side

- \( {\text{i}}^{\prime}_{{{\text{o}}\,{\text{C}}}} \)
Output current referred to the primary in CCM

- \( {\text{i}}^{\prime}_{{{\text{o}}\,{\text{D}}}} \)
Output current referred to the primary in DCM

- \( {\text{I}}^{\prime}_{\text{o}} \)
\( \left( {\overline{{{\text{I}}^{\prime}_{\text{o}} }} } \right) \) average output current referred to the primary and its normalized value

- \( {\text{I}}^{\prime}_{{{\text{o}}\,{\text{C}}}} \)
\( {\left( \overline{{{\text{I}}^{\prime}_{{{\text{o}}\;{\text{C}}}} }} \right)} \) average output current in CCM referred to the primary and its normalized value

- \( {\text{I}}^{\prime}_{{{\text{o}}\,{\text{D}}}} \)
\( {\left( \overline{{{\text{I}}^{\prime}_{{{\text{o}}\;{\text{D}}}} }} \right)} \) average output current in DCM referred to the primary and its normalized value

- \( {\text{I}}^{\prime}_{{{\text{o}}\,{\text{L}}}} \left( {\overline{{{\text{I}}^{\prime}_{{{\text{o}}\,{\text{L}}}} }} } \right) \)
Average output current in the limit (critical conduction mode) between CCM/DCM, referred to the primary winding and its normalized value

- S
_{1}and S_{2} Switches in the leading leg

- S
_{3}and S_{4} Switches in the lagging leg

- v
_{g1}, v_{g2}, v_{g3}and v_{g4} Switches S

_{1}, S_{2}, S_{3}and S_{4}drive signals, respectively- D
_{1}, D_{2}, D_{3}and D_{4} Diodes in anti-parallel to the switches (MOSFET—intrinsic diodes)

- C
_{1}, C_{2}, C_{3}and C_{4} Capacitors in parallel to the switches (MOSFET—intrinsic capacitors)

- L
_{c} Transformer leakage inductance or an additional inductor

- i
_{Lc} Inductor current

- I
_{Lc} \( \left( {\overline{{{\text{I}}_{\text{Lc}} }} } \right) \) inductor peak current and its normalized value, commutation current for S

_{1}and S_{3}- \( {\text{I}}_{\text{Lc}}\_{\text{C}} \)
\( \left( {\overline{{{\text{I}}_{{{\text{Lc}}\_{\text{C}}}} }} } \right) \) inductor peak current in CCM and its normalized value

- \( {\text{I}}_{\text{Lc}}\_{\text{D}} \)
\( \left( {\overline{{{\text{I}}_{{{\text{Lc}}\_{\text{D}}}} }} } \right) \) inductor peak current in DCM and its normalized value

- \( \overline{{{\text{I}}_{\text{Lc RMS}} }} \)
Inductor L

_{c}normalized RMS current- \( {{{{\text{I}}_{{{\text{Lc}}\,{\text{RMS}}{\_}{\text{C}}}} }} } \)
\( \left( {\overline{{{\text{I}}_{{{\text{Lc}}\,{\text{RMS}}{\_}{\text{C}}}} }} } \right) \) inductor L

_{c}RMS current in CCM and its normalized value- I
_{Lc RMS_D} \( \left( {\overline{{{\text{I}}_{{{\text{Lc}}\,{\text{RMS}}{\_}{\text{D}}}} }} } \right) \) inductor L

_{c}RMS current in DCM and its normalized value- I
_{1} \( \left( {\overline{{{\text{I}}_{1} }} } \right) \) inductor current at the end of the first and fourth step of operation (commutation current for S

_{2}and S_{4}) and its normalized value- v
_{ab} Full bridge ac voltage, between points “a” and “b”

- v
_{cb} Inductor voltage, between points “c” and “b”

- v
_{ac} Voltage at the ac side of the rectifier, between points “a” and “c”

- v
_{S1}, v_{S2}, v_{S3}and v_{S4} Voltage across switches

- i
_{S1}, i_{S2}, i_{S3}and i_{S4} Current in the switches

- i
_{C1}, i_{C2}, i_{C3}and i_{C4} Current in the capacitors

- ∆T
Time interval which v

_{ab}= ±V_{i}- ∆t
_{1} Time interval of the first step of operation (t

_{1}–t_{0})- ∆t
_{2} Time interval of the second step of operation (t

_{2}–t_{1})- ∆t
_{3} Time interval of the third step of operation (t

_{3}–t_{2})- ∆t
_{4} Time interval of the fourth step of operation (t

_{4}–t_{3})- ∆t
_{5} Time interval of the fifth step of operation (t

_{5}–t_{4})- ∆t
_{6} Time interval of the sixth step of operation (t

_{6}–t_{5})- A
_{1}, A_{2}and A_{3} Areas

## Reference

- 1.Barbi, I., Filho, W.A.: A non-resonant zero-voltage switching pulse-width modulated full-bridge DC-to-DC converter. In: IECON, pp. 1051–1056 (1990)Google Scholar