Advertisement

Design Methodology for BiCMOS Millimeter-Wave Integrated Circuits

  • David del Rio
  • Ainhoa Rezola
  • Juan F. Sevillano
  • Igone Velez
  • Roc Berenguer
Chapter
Part of the Analog Circuits and Signal Processing book series (ACSP)

Abstract

The design of millimeter-wave circuits involves understanding and dealing with new challenges, which make every design step crucial for a successful design. For instance, the high frequency of operation makes almost every layout connection behave as a transmission line, and therefore, they need to be adequately modeled and sized. In addition, transistors work close to their maximum operating frequency and voltages, and thus adequate transistor layout and biasing are a must, not to mention the fact that some components like transmission lines or transformers are not readily available in the design kits, and some other available components are not adequately modeled upto millimeter-wave frequencies. This means that the classical lower frequency design methodology consisting of sequential schematic simulation, layout implementation, and parasitic extraction is no longer valid, as the parasitics and electromagnetic behavior of every component and connection need to be taken into account from the very beginning. This chapter will outline the design methodology to be followed for successful, time- and resource-efficient design of millimeter-wave integrated circuits.

References

  1. 1.
    D. del Rio, I. Gurutzeaga, H. Solar, A. Beriain, R. Berenguer, Layout-aware design methodology for a 75 GHz power amplifier in a 55 nm SiGe technology. Integr. VLSI J. 52, 208–216 (2016).  https://doi.org/10.1016/j.vlsi.2015.07.010. ISSN: 0167-9260
  2. 2.
    P. Chevalier, G. Avenier, G. Ribes, A. Montagn’e, E. Canderle, D. C’eli, N. Derrier, C. Deglise, C. Durand, T. Qu’emerais, M. Buczko, D. Gloria, O. Robin, S. Petitdidier, Y. Campidelli, F. Abbate, M. Gros-Jean, L. Berthier, J. D. Chapon, F. Leverd, C. Jenny, C. Richard, O. Gourhant, C. De-Buttet, R. Beneyton, P. Maury, S. Joblot, L. Favennec, M. Guillermet, P. Brun, K. Courouble, K. Haxaire, G. Imbert, E. Gourvest, J. Cossalter, O. Saxod, C. Tavernier, F. Foussadier, B. Ramadout, R. Bianchini, C. Julien, D. Ney, J. Rosa, S. Haendler, Y. Carminati, B. Borot, A 55 nm Triple Gate Oxide 9 Metal Layers SiGe BiCMOS Technology Featuring 320 GHz fT/370 GHz fMAX HBT and High-Q Millimeter-Wave Passives, in 2014 IEEE International Electron Devices Meeting (IEDM), (2014), pp. 3.9.1–3.9.3.  https://doi.org/10.1109/IEDM.2014.7046978
  3. 3.
    R. O’Rourke, 3D Electromagnetic simulation versus planar MoM. Microw. J. 58(7), 68–78 (2015). ISSN: 01926225Google Scholar
  4. 4.
    Electromagnetic; Advanced Design System 2012.08, Agilent Technologies (2012)Google Scholar
  5. 5.
    P.-Y. Chiu, M.-D. Ker, Metal-layer capacitors in the 65 nm CMOS process and the application for low-leakage power-rail ESD clamp circuit. Microelectron. Reliab. 54(1), 64–70 (2014).  https://doi.org/10.1016/j.microrel.2013.08.011. ISSN: 0026-2714
  6. 6.
    D.M. Pozar, Microwave Engineering, 3rd edn. (Wiley, Hoboken, 2005)Google Scholar
  7. 7.
    J.L. Gonz’alez, B. Martineau, D. Belot, On the electrical properties of slotted metallic planes in CMOS processes for RF and millimeterwave applications. Microelectron. J. 43(8), 582–591 (2012).  https://doi.org/10.1016/j.mejo.2012.04.003. ISSN: 00262692
  8. 8.
    B. Leite, E. Kerherve, J.-B. Begueret, D. Belot, Shielding structures for millimeter-wave integrated transformers, in 16th IEEE International Conference on Electronics, Circuits, and Systems (ICECS), (2009), pp. 239–242.  https://doi.org/10.1109/ICECS.2009.5410980
  9. 9.
    M. Rickelt, H.-M. Rein, E. Rose, Influence of impact-ionization- induced instabilities on the maximum usable output voltage of Si-Bipolar transistors. IEEE Trans. Electron Devices 48(4), 774–783 (2001).  https://doi.org/10.1109/16.915725. ISSN: 0018-9383
  10. 10.
    C. M. Grens, A Comprehensive Study of Safe-Operating-Area, Biasing Constraints, and Breakdown in Advanced SiGe HBTs, Ph.D. thesis, School of Electrical and Computer Engineering, Georgia Institute of Technology (2005)Google Scholar
  11. 11.
    V. Subramanian, A. Hamidian, W. Keusgen, V.-H. Do, G. Boeck, Layout design considerations for 60 GHZ SiGe power amplifiers, in 17th International Conference on Microwaves, Radar and Wireless Communications, MIKON 2008, (2008), pp. 1–4Google Scholar

Copyright information

© Springer International Publishing AG, part of Springer Nature 2019

Authors and Affiliations

  • David del Rio
    • 1
  • Ainhoa Rezola
    • 1
  • Juan F. Sevillano
    • 1
  • Igone Velez
    • 1
  • Roc Berenguer
    • 2
  1. 1.Ceit-IK4 Technology CenterDonostiaSpain
  2. 2.Tecnun-University of NavarraDonostiaSpain

Personalised recommendations