Abstract
This chapter proposes and analyzes two autonomous, hardware-based monitor/knob solutions for Network-on-Chip (NoC) architectures, which operate at the micro-architectural level. The two proposed techniques tackle power and reliability issues pertaining to the NoC: (a) the BlackOut architecture is a fine-grained power-gating methodology targeting individual router buffers. Its goal is to minimize leakage power consumption, without adversely impacting the system performance; (b) the NoCAlert framework is a comprehensive on-line and real-time fault-detection and localization mechanism. Based on the concept of invariance checking, NoCAlert employs a group of lightweight micro-checker modules that collectively implement real-tim5e hardware assertions. Overall, the two solutions demonstrate the potential for ultrafast and low-cost monitor-and-knob mechanisms that can be applied to the NoC of multi-/many-core chips.
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Zoni, D. et al. (2019). Monitor and Knob Techniques in Network-on-Chip Architectures. In: Fornaciari, W., Soudris, D. (eds) Harnessing Performance Variability in Embedded and High-performance Many/Multi-core Platforms. Springer, Cham. https://doi.org/10.1007/978-3-319-91962-1_9
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