Methods and Tools for Mapping Process Networks onto Multi-Processor Systems-On-Chip

  • Iuliana Bacivarov
  • Wolfgang Haid
  • Kai Huang
  • Lothar ThieleEmail author


Applications based on the Kahn process network (KPN) model of computation are determinate, modular, and based on FIFO communication for inter-process communication. While these properties allow KPN applications to efficiently execute on multi-processor systems-on-chip (MPSoC), they also enable the automation of the design process. This chapter focuses on the second aspect and gives an overview of methods for automating the design process of KPN applications implemented on MPSoCs. Whereas previous chapters mainly introduced techniques that apply to restricted classes of process networks, this overview will be dealing with general Kahn process networks.


  1. 1.
    B. Kienhuis, E. Deprettere, K. Vissers, P. van der Wolf, in Proc. Int’l Conf. on Application-Specific Systems, Architectures and Processors (ASAP) (Washington, DC, USA, 1997), pp. 338–349Google Scholar
  2. 2.
    D. Densmore, A. Sangiovanni-Vincentelli, R. Passerone, IEEE Design & Test of Computers 23(5), 359 (2006)CrossRefGoogle Scholar
  3. 3.
    G. Kahn, in Proc. IFIP Congress (Stockholm, Sweden, 1974), pp. 471–475Google Scholar
  4. 4.
  5. 5.
    F. Balarin, Y. Watanabe, H. Hsieh, L. Lavagno, C. Passerone, A. Sangiovanni-Vincentelli, Computer 36(4), 45 (2003). CrossRefGoogle Scholar
  6. 6.
    MathWorks Real-Time Workshop.
  7. 7.
    NI LabVIEW Microprocessor SDK.
  8. 8.
    J. Keinert, M. Streubühr, T. Schlichter, J. Falk, J. Gladigau, C. Haubelt, J. Teich, M. Meredith, ACM Trans. on Design Automation of Electronic Systems 14(1), 1:1 (2009)Google Scholar
  9. 9.
    S. Ha, S. Kim, C. Lee, Y. Yi, S. Kwon, Y.P. Joo, ACM Trans. on Design Automation of Electronic Systems 12(3), 1 (2007)CrossRefGoogle Scholar
  10. 10.
    J. Falk, J. Keinert, C. Haubelt, J. Teich, C. Zebelein, Integrated modeling using finite state machines and dataflow graphs. second edition (Springer, 2012)Google Scholar
  11. 11.
    A.D. Pimentel, C. Erbas, S. Polstra, IEEE Trans. on Computers 55(2), 99 (2006)CrossRefGoogle Scholar
  12. 12.
    L. Thiele, I. Bacivarov, W. Haid, K. Huang, in Proc. Int’l Conf. on Application of Concurrency to System Design (ACSD) (Bratislava, Slovak Republic, 2007), pp. 29–40Google Scholar
  13. 13.
    H. Nikolov, T. Stefanov, E. Deprettere, IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems 27(3), 542 (2008)CrossRefGoogle Scholar
  14. 14.
    T. Kangas, P. Kukkala, H. Orsila, E. Salminen, M. Hännikäinen, T.D. Hämäläinen, ACM Trans. on Embedded Computing Systems 5(2), 281 (2006)CrossRefGoogle Scholar
  15. 15.
    A. Kumar, S. Fernando, Y. Ha, B. Mesman, H. Corporaal, ACM Trans. on Design Automation of Electronic Systems 31(3), 40:1 (2008)Google Scholar
  16. 16.
    S.S. Bhattacharyya, G. Brebner, J.W. Janneck, J. Eker, C. von Platen, M. Mattavelli, M. Raulet, in First Swedish Workshop on Multi-Core Computing (MCC) (Uppsala, Sweden, 2008)Google Scholar
  17. 17.
    S.A. Edwards, O. Tardieu, IEEE Trans. on VLSI Systems 14(8), 854 (2006)CrossRefGoogle Scholar
  18. 18.
    M.I. Gordon, W. Thies, S. Amarasinghe, in Proc. Int’l Conf. on Architectural Support for Programming Languages and Operating Systems (ASPLOS) (San Jose, CA, USA, 2006), pp. 151–162Google Scholar
  19. 19.
    B. Kienhuis, E. Rijpkema, E. Deprettere, in Proc. of the Int’l Workshop on Hardware/Software Codesign (CODES) (San Diego, CA, USA, 2000), pp. 13–17Google Scholar
  20. 20.
    S. Verdoolaege, H. Nikolov, T. Stefanov, EURASIP Journal on Embedded Systems 2007 (2007)CrossRefGoogle Scholar
  21. 21.
    A.D. Pimentel, Int. J. Embedded Systems 3(3), 181 (2008)CrossRefGoogle Scholar
  22. 22.
    J.W. Janneck, I.D. Miller, D.B. Parlour, G. Roquier, M. Wipliez, M. Raulet, in IEEE Workshop on Signal Processing Systems (SiPS) (Washington, D.C., USA, 2008), pp. 287–292Google Scholar
  23. 23.
    N. Vasudevan, S.A. Edwards, in Proc. ACM Symposium on Applied Computing (SAC) (Honolulu, HI, USA, 2009), pp. 1626–1631Google Scholar
  24. 24.
    D. Gelernter, N. Carriero, Commun. ACM 35(2), 97 (1992)CrossRefGoogle Scholar
  25. 25.
    T.M. Parks, Bounded Scheduling of Process Networks. Ph.D. thesis, University of California, Berkeley (1995)Google Scholar
  26. 26.
    IBM SDK for Multicore Acceleration.
  27. 27.
    K. Huang, I. Bacivarov, J. Liu, W. Haid, in IEEE Symposium on Industrial Embedded Systems (SIES) (IEEE, Ecole Polytechnique Fédérale de Lausanne, Switzerland, 2009), pp. 74–81Google Scholar
  28. 28.
    M. González Harbour, J.J. Gutiérrez García, J.C. Palencia Gutiérrez, J.M. Drake Moyano, in Proc. Euromicro Conference on Real-Time Systems (Delft, The Netherlands, 2001), pp. 125–134Google Scholar
  29. 29.
    S. Chakraborty, S. Künzli, L. Thiele, in Proc. Design, Automation and Test in Europe (DATE) (Munich, Germany, 2003), pp. 190–195Google Scholar
  30. 30.
    R. Henia, A. Hamann, M. Jersak, R. Racu, K. Richter, R. Ernst, IEE Proceedings Computers and Digital Techniques 152(2), 148 (2005)CrossRefGoogle Scholar
  31. 31.
    R. Alur, D.L. Dill, Theoretical Computer Science 126(2), 183 (1994)MathSciNetCrossRefGoogle Scholar
  32. 32.
    M. Hendriks, M. Verhoef, in Workshop on Parallel and Distributed Real-Time Systems (Rhodes, Greece, 2006)Google Scholar
  33. 33.
    S. Perathoner, E. Wandeler, L. Thiele, A. Hamann, S. Schliecker, R. Henia, R. Racu, R. Ernst, M. González Harbour, in Proc. Int’l Conf. on Embedded Software (EMSOFT) (Salzburg, Austria, 2007), pp. 193–202.
  34. 34.
    E. Wandeler, L. Thiele, in Proc. Asia and South Pacific Conf. on Design Automation (ASP-DAC) (Yokohama, Japan, 2006), pp. 479–484Google Scholar
  35. 35.
    A. Hamann, R. Racu, R. Ernst, in Proc. Real Time and Embedded Technology and Applications Symposium (RTAS) (Bellevue, WA, United States, 2007), pp. 269–280Google Scholar
  36. 36.
    S. Kraemer, L. Gao, J. Weinstock, R. Leupers, G. Ascheid, H. Meyr, in Proc. Int’l Conf. on Hardware/Software Codesign and System Synthesis (CODES+ISSS) (Salzburg, Austria, 2007), pp. 75–80Google Scholar
  37. 37.
    I. Bacivarov, A. Bouchhima, S. Yoo, A.A. Jerraya, International Journal of Embedded Systems (IJES) 1(1/2), 103 (2005). Scholar
  38. 38.
    S. Schliecker, S. Stein, R. Ernst, in Proc. Design, Automation and Test in Europe (DATE) (2007), pp. 273–278Google Scholar
  39. 39.
    S. Künzli, A. Hamann, R. Ernst, L. Thiele, in Proc. Int’l Conf. on Hardware/Software Codesign and System Synthesis (CODES/ISSS) (Salzburg, Austria, 2007), pp. 63–68Google Scholar
  40. 40.
    S. Künzli, F. Poletti, L. Benini, L. Thiele, in Proc. Design, Automation and Test in Europe (DATE) (2006), pp. 236–241Google Scholar
  41. 41.
    M. Gries, Integration, the VLSI Journal 38(2), 131 (2004)CrossRefGoogle Scholar
  42. 42.
    S. Ha, H. Oh, Decidable dataflow models for signal processing: Synchronous dataflow and its extensions. second edition (Springer, 2012)Google Scholar
  43. 43.
    K. Huang, W. Haid, I. Bacivarov, M. Keller, L. Thiele, ACM Transactions in Embedded Computing Systems (TECS) (2012)Google Scholar
  44. 44.
    Distributed application layer.
  45. 45.
    M. Geilen, T. Basten, Kahn process networks and a reactive extension. second edition (Springer, 2012)Google Scholar
  46. 46.
    E.A. de Kock, G. Essink, W.J.M. Smits, P. van der Wolf, J.Y. Brunel, W.M. Kruijtzer, P. Lieverse, K.A. Vissers, in Proc. Design Automation Conference (DAC) (Los Angeles, CA, USA, 2000), pp. 402–405Google Scholar
  47. 47.
    S.A. Edwards, N. Vadudevan, O. Tardieu, in Proc. Design, Automation and Test in Europe (DATE) (Munich, Germany, 2008), pp. 1498–1503Google Scholar
  48. 48.
    D.C. Pham, T. Aipperspach, D. Boerstler, M. Bolliger, R. Chaudhry, D. Cox, P. Harvey, P.M. Harvey, H.P. Hofstee, C. Johns, J. Kahle, A. Kameyama, J. Keaty, Y. Masubuchi, M. Pham, J. Pille, S. Posluszny, M. Riley, D.L. Stasiak, M. Suzuoki, O. Takahashi, J. Warnock, S. Weitzel, D. Wendel, K. Yazawa, IEEE Journal of Solid-State Circuits 41(1), 179 (2006)CrossRefGoogle Scholar
  49. 49.
    P.S. Paolucci, A.A. Jerraya, R. Leupers, L. Thiele, P. Vicini, in Proc. Int’l Conf. on Hardware/Software Codesign and System Synthesis (CODES+ISSS) (Seoul, South Korea, 2006), pp. 167–172Google Scholar
  50. 50.
    L. Benini, D. Bertozzi, B. Alessandro, F. Menichelli, M. Olivieri, The Journal of VLSI Signal Processing 41, 169 (2005). CrossRefGoogle Scholar
  51. 51.
    T.G. Mattson, M. Riepen, T. Lehnig, P. Brett, W. Haas, P. Kennedy, J. Howard, S. Vangal, N. Borkar, G. Ruhl, S. Dighe, in Proceedings of the 2010 ACM/IEEE International Conference for High Performance Computing, Networking, Storage and Analysis (IEEE Computer Society, Washington, DC, USA, 2010), SC ’10, pp. 1–11.
  52. 52.
    RTEMS Home Page.
  53. 53.
    W. Haid, L. Schor, K. Huang, I. Bacivarov, L. Thiele, in Proc. IEEE Workshop on Embedded Systems for Real-Time Multimedia (ESTIMedia) (Grenoble, France, 2009), pp. 35–44Google Scholar
  54. 54.
    S. Edwards, L. Lavagno, E.A. Lee, A. Sangiovanni-Vincentelli, Proceedings of the IEEE 85(3), 366 (1997)CrossRefGoogle Scholar
  55. 55.
    H. Kopetz, G. Bauer, Proceedings of the IEEE 91(1), 112 (2003)CrossRefGoogle Scholar
  56. 56.
    T.A. Henzinger, B. Horowitz, C.M. Kirsch, Proceedings of the IEEE 91(1), 84 (2003)CrossRefGoogle Scholar
  57. 57.
    A. Benveniste, P. Caspi, S.A. Edwards, N. Halbwachs, P. Le Guernic, R. De Simone, Proceedings of the IEEE 91(1), 64 (2003)CrossRefGoogle Scholar
  58. 58.
    E. Wandeler, L. Thiele, M. Verhoef, P. Lieverse, Int’l Journal on Software Tools for Technology Transfer (STTT) 8(6), 649 (2006)Google Scholar
  59. 59.
    L. Thiele, S. Chakraborty, M. Naedele, in Proc. Int’l Symposium on Circuits and Systems (ISCAS), vol. 4 (Geneva, Switzerland, 2000), vol. 4, pp. 101–104Google Scholar
  60. 60.
    R.L. Cruz, IEEE Trans. Inf. Theory 37(1), 114 (1991)CrossRefGoogle Scholar
  61. 61.
    J.Y. Le Boudec, P. Thiran, Network Calculus — A Theory of Deterministic Queuing Systems for the Internet, Lecture Notes in Computer Science, vol. 2050 (Springer Verlag, 2001)Google Scholar
  62. 62.
    E. Wandeler, L. Thiele. Real-Time Calculus (RTC) Toolbox. (2006).
  63. 63.
    W. Haid, M. Keller, K. Huang, I. Bacivarov, L. Thiele, in Proc. Int’l Conf. on Systems, Architectures, Modeling and Simulation (IC-SAMOS) (Samos, Greece, 2009), pp. 92–99Google Scholar
  64. 64.
    R. Wilhelm, J. Engblom, A. Ermedahl, N. Holsti, S. Thesing, D. Whalley, G. Bernat, C. Ferdinand, R. Heckmann, T. Mitra, F. Mueller, I. Puaut, P. Puschner, J. Staschulat, P. Stenström, ACM Trans. on Embedded Computing Systems 7(3), 36:1 (2008)Google Scholar
  65. 65.
    A.D. Pimentel, M. Thompson, S. Polstra, C. Erbas, Journal of Signal Processing Systems 50(2), 99 (2008)CrossRefGoogle Scholar
  66. 66.
    D. Rai, H. Yang, I. Bacivarov, J.J. Chen, L. Thiele, (DATE11, Grenoble, France, 2011)Google Scholar
  67. 67.
    L. Schor, I. Bacivarov, H. Yang, L. Thiele, in Proc. IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS) (IEEE Computer, Beijing, China, 2012)Google Scholar
  68. 68.
    L. Thiele, L. Schor, H. Yang, I. Bacivarov, in Proc. Design Automation Conference (DAC) (ACM, San Diego, California, USA, 2011), pp. 268–273Google Scholar
  69. 69.
    E. Zitzler, L. Thiele, IEEE Trans. on Evolutionary Computation 3(4), 257 (1999)CrossRefGoogle Scholar
  70. 70.
    E. Zitzler, L. Thiele, J. Bader, in Conf. on Parallel Problem Solving From Nature (PPSN) (Dortmund, Germany, 2008), pp. 847–858Google Scholar
  71. 71.
    L. Thiele, S. Chakraborty, M. Gries, S. Künzli, in Proc. Design Automation Conference (DAC) (New Orleans, LA, USA, 2002), pp. 880–885Google Scholar
  72. 72.
    E. Zitzler, M. Laumanns, L. Thiele, in Proc. Evolutionary Methods for Design, Optimisation, and Control (EUROGEN) (Athens, Greece, 2001), pp. 95–100Google Scholar
  73. 73.
    S. Bleuler, M. Laumanns, L. Thiele, E. Zitzler, in Int’l Conf. on Evolutionary Multi-Criterion Optimization (EMO) (Faro, Portugal, 2003), pp. 494–508Google Scholar
  74. 74.
    G.K. Wallace, IEEE Trans. on Consumer Electronics 38(1), 18 (1992). CrossRefGoogle Scholar
  75. 75.
    P. Marwedel, J. Teich, G. Kouveli, I. Bacivarov, L. Thiele, S. Ha, C. Lee, Q. Xu, L. Huang, (CODES+ISSS’11, October 9–14, 2011, Taipei, Taiwan., 2011)Google Scholar

Copyright information

© Springer International Publishing AG, part of Springer Nature 2019

Authors and Affiliations

  • Iuliana Bacivarov
    • 1
  • Wolfgang Haid
    • 1
  • Kai Huang
    • 1
  • Lothar Thiele
    • 1
    Email author
  1. 1.Computer Engineering and Networks LaboratoryETH ZurichZurichSwitzerland

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