Abstract
In this chapter, a third design example is presented. The considered circuit is the Grain-128a stream cipher with × 2 option which is a cryptographic block. The circuit is designed in a 180 nm bulk CMOS technology both with MCML and CMOS gates for comparing the power supply noise performance.
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References
M. Ågren, M. Hell, T. Johansson, W. Meier, Grain-128a: a new version of Grain-128 with optional authentication. Int. J. Wirel. Mob. Comput. 5(1), 48–59 (2011)
M. Hell, T. Johansson, A. Maximov, W. Meier, A stream cipher proposal: Grain-128, in 2006 IEEE International Symposium on Information Theory, July 2006, pp. 1614–1618
C. Paar, J. Pelzl, Understanding Cryptography: A Textbook for Students and Practitioners, 1st edn. (Springer, Berlin, 2009)
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Badel, S., Baltaci, C., Cevrero, A., Leblebici, Y. (2019). Design Example III: Grain-128a Stream Cipher. In: Design Automation for Differential MOS Current-Mode Logic Circuits . Springer, Cham. https://doi.org/10.1007/978-3-319-91307-0_8
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DOI: https://doi.org/10.1007/978-3-319-91307-0_8
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