The Global Integrated Circuit Supply Chain Flow and the Hardware Trojan Attack

  • Hassan Salmani


The complexity of modern designs, the significant cost of research and development, and the shrinking time-to-market window heavily enforce the horizontal integrated circuit design flow. Many entities across the globe might be involved in the flow and none are necessarily trusted. A malicious party can implement a hardware Trojan attack through manipulating a circuit to undermine its characteristics under rare circumstances at different stages of the flow before and after circuit manufacturing. Detection of hardware Trojans using existing pre-silicon and post-silicon verification techniques is a very challenging task because of the complexity of modern designs, their verity of application, and limited time for verification. This chapter provides an overview on the global supply chain for integrated circuits and the hardware Trojan attack.


  1. 1.
    Statista: forecast of worldwide semiconductor sales of integrated circuits. Accessed 22 Jan 2018
  2. 2.
    S. Patel, Changing SoC design methodologies to automate IP integration and reuse. Accessed 22 Jan 2018
  3. 3.
    K.M. Mohan, Outsourcing Trends in Semiconductor Industry, Massachusetts Institute of Technology, 2010Google Scholar
  4. 4.
  5. 5.
    R. Saleh, S. Wilton, S. Mirabbasi, A. Hu, M. Greenstreet, G. Lemieux, P.P. Pande, C. Grecu, A. Ivanov, System-on-chip: reuse and integration. Proc. IEEE 94(6), 1050–1069 (2006)CrossRefGoogle Scholar
  6. 6.
    India Semiconductor and Embedded Design Service Industry (2007–2010), Market, Technology and Ecosystem Analysis (India Semiconductor Association, Bangalore, 2008)Google Scholar
  7. 7.
    J. Villasenor, Compromised By Design? Securing the Defense Electronics Supply Chain (The Center for Technology Innovation at Brookings, Washington, 2013)Google Scholar
  8. 8.
    B. Johnson, D. Freeman, D. Christensen, S.T. Wang, Market trends: rising costs of production limit availability of leading-edge fabs. Accessed 22 Jan 2018
  9. 9.
    M.D. Platzer, J.F. Sargent Jr., U.S. semiconductor manufacturing: industry trends, global competition, federal policy (2016)Google Scholar
  10. 10.
    H. Jones, Whitepaper: semiconductor industry from 2015 to 2025. Accessed 22 Jan 2018
  11. 11.
    A. Avizienis, J.-C. Laprie, B. Randell, C. Landwehr, Basic concepts and taxonomy of dependable and secure computing. IEEE Trans. Dependable Secure Comput. 1(1), 11–33 (2004)CrossRefGoogle Scholar
  12. 12.
    L.-T. Wang, C.-W. Wu, X. Wen, VLSI Test Principles and Architectures (Morgan Kaufmann Publishers, San Francisco, 2006)Google Scholar
  13. 13.
    H. Salmani, M. Tehranipoor, R. Karri, On design vulnerability analysis and trust benchmarks development, in 2013 IEEE 31st International Conference on Computer Design, ICCD 2013, Asheville, NC, 6–9 October 2013, pp. 471–474Google Scholar
  14. 14.
    W. Chen, S. Ray, J. Bhadra, M. Abadir, L.C. Wang, Challenges and trends in modern SoC design verification. IEEE Des. Test 34(5), 7–22 (2017)CrossRefGoogle Scholar
  15. 15.
    P. Mishra, R. Morad, A. Ziv, S. Ray, Post-silicon validation in the SoC era: a tutorial introduction. IEEE Des. Test 34(3), 68–92 (2017)CrossRefGoogle Scholar

Copyright information

© Springer International Publishing AG, part of Springer Nature 2018

Authors and Affiliations

  • Hassan Salmani
    • 1
  1. 1.EECS DepartmentHoward UniversityWashington, DCUSA

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