• Jeffrey Prinzie
  • Michiel Steyaert
  • Paul Leroux
Part of the Analog Circuits and Signal Processing book series (ACSP)


In this work, the design aspects of radiation hardened CMOS time-based signal processing circuits were discussed. To gain more insight in this field, different aspects were discussed, starting with the fundamental physics which are involved in the interaction of radiation with silicon, to the practical design implementations of the circuits. In order to validate the proposed circuits and radiation hardening techniques, a detailed experimental study was done to verify the circuits before, during and after irradiation. These results were used to further reduce the sensitivity of CMOS time-based circuits to ionizing radiation.


Radiation Hardness Radiation Hardening Techniques Bang-bang Phase Detector Varactor High-energy Physics Community 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


  1. 67.
    J. Prinzie, M. Steyaert, and P. Leroux. A single shot TDC with 4.8 ps resolution in 40 nm CMOS for high energy physics applications. Journal of Instrumentation, 10(01):C01031, 2015.Google Scholar
  2. 93.
    J. Prinzie, J. Christiaensen, P. Moreira, M. Steyaert, and P. Leroux. A low noise clock generator for high-resolution time-to-digital convertors. Journal of Instrumentation, 11(02):C02038, 2016.Google Scholar
  3. 132.
    J. Prinzie, M. Steyaert, and P. Leroux. A self-calibrated bang bang phase detector for low-offset time signal processing. IEEE Transactions on Circuits and Systems II: Express Briefs, 63(5):453–457, May 2016.Google Scholar
  4. 158.
    J. Prinzie, M. Steyaert, P. Leroux, J. Christiansen, and P. Moreira. A single-event upset robust, 2.2 GHz to 3.2 GHz, 345 fs jitter PLL with triple-modular redundant phase detector in 65 nm CMOS. In 2016 IEEE Asian Solid-State Circuits Conference (A-SSCC), pages 285–288, Nov 2016.Google Scholar
  5. 159.
    J. Prinzie, J. Christiansen, P. Moreira, M. Steyaert, and P. Leroux. Comparison of a 65 nm CMOS ring- and LC-oscillator based PLL in terms of TID and SEU sensitivity. IEEE Transactions on Nuclear Science, 64(1):245–252, Jan 2017.Google Scholar

Copyright information

© Springer International Publishing AG, part of Springer Nature 2018

Authors and Affiliations

  • Jeffrey Prinzie
    • 1
  • Michiel Steyaert
    • 2
  • Paul Leroux
    • 1
  1. 1.KU LeuvenGeelBelgium
  2. 2.KU LeuvenHeverleeBelgium

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