Optimization of the GNU OpenMP Synchronization Barrier in MPSoC

  • Maxime France-Pillois
  • Jérôme Martin
  • Frédéric Rousseau
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 10793)


Synchronization mechanisms have been central issues in the race toward the computing units parallelization. Indeed when the number of cores increases, the applications are split into more and more software tasks, leading to the higher use of synchronization primitives to preserve the initial application services. In this context, providing efficient synchronization mechanisms turns to be essential to leverage parallelism offered by Multi-Processor Systems-on-Chip.

By using an instrumented emulation platform allowing us to extract accurate timing information, in a non-intrusive way, we led a fine analysis of the synchronization barriers of the GNU OpenMP library. This study reveals that a time expensive function was uselessly called during the barrier awakening process. We propose here a software optimization of this library that saves up to \(80\%\) of the release phase duration for a 16-core MSoCs. Moreover, being localized into the middle-ware OpenMP library, benefiting this optimization requires no specific care from the application programmer’s point of view, but a library update and can be used on every kinds of platform.


GNU OpenMP library Emulation platform Synchronization barrier optimization Generic middle-ware optimization 


  1. 1.
  2. 2.
  3. 3.
  4. 4.
  5. 5.
  6. 6.
    Abellan, J., Fernandez, J., Acacio, M.: Efficient hardware barrier synchronization in many-core CMPs. IEEE Trans. Parallel Distrib. Syst. 23(8), 1453–1466 (2012)CrossRefGoogle Scholar
  7. 7.
    Buchmann, R., Greiner, A.: A fully static scheduling approach for fast cycle accurate systemC simulation of MPSoCs. In: 2007 International Conference on Microelectronics, pp. 101–104 (2007)Google Scholar
  8. 8.
    Hoefler, T., Mehlan, T., Mietke, F., Rehm, W.: A survey of barrier algorithms for coarse grained supercomputers. Chemnitzer Informatik Berichte 04(03) (2004). ISSN: 0947-5152.
  9. 9.
    Leiserson, C.E., et al.: The network architecture of the connection machine CM-5. In: Proceedings of the Fourth Annual ACM Symposium on Parallel Algorithms and Architectures, SPAA 1992, pp. 272–285. ACM (1992)Google Scholar
  10. 10.
    Monchiero, M., Palermo, G., Silvano, C., Villa, O.: Efficient synchronization for embedded on-chip multiprocessors. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 14(10), 1049–1062 (2006)CrossRefGoogle Scholar
  11. 11.
    Soga, T., Sasaki, H., Hirao, T., Kondo, M., Inoue, K.: A flexible hardware barrier mechanism for many-core processors. In: Asia and South Pacific Design Automation Conference (ASP-DAC), 2015 20th Asia and South Pacific, pp. 61–68 (2015)Google Scholar
  12. 12.
    Villa, O., Palermo, G., Silvano, C.: Efficiency and scalability of barrier synchronization on NoC based many-core architectures. In: Proceedings of the 2008 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES 2008, pp. 81–90. ACM (2008)Google Scholar
  13. 13.
    Wei, Z., Liu, P., Sun, R., Ying, R.: TAB barrier: hybrid barrier synchronization for NoC-based processors. In: 2015 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 409–412 (2015)Google Scholar
  14. 14.
    Zhengbin, P., Shaogang, W., Dan, W., Pingjing, L.: Hardware acceleration of barrier communication for large scale parallel computer. In: 2013 8th International ICST Conference on Communications and Networking in China (CHINACOM), pp. 610–614 (2013)Google Scholar

Copyright information

© Springer International Publishing AG, part of Springer Nature 2018

Authors and Affiliations

  • Maxime France-Pillois
    • 1
    • 2
  • Jérôme Martin
    • 1
    • 2
  • Frédéric Rousseau
    • 3
  1. 1.Univ. Grenoble AlpesGrenobleFrance
  2. 2.CEA, LETI, MINATEC CampusGrenobleFrance
  3. 3.TIMA, CNRS Grenoble INP, Institute of EngineeringUniv. Grenoble AlpesGrenobleFrance

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