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Chip Performance and Power

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Abstract

Although already used in the 1970s, it took until the mid-1980s before CMOS became the leading-edge technology for VLSI circuits. Prior to that time, only those applications that really required the low-power features of CMOS were designed in it. Most examples, then, were battery-supplied applications, such as wristwatches, pocket calculators, portable medical devices (hearing aids and implantable heart controls) and remote controls.

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Notes

  1. 1.

    Note: Not every reader has access to the published articles of microelectronic conferences and magazines. A lot of effort has therefore been given to refer to those publications that are directly accessible through web pages on the Internet. However, these data may be volatile because some owners update and change the contents on their web pages, so that some of the references below may only be accessible during a short time after the print of this book. Finally a lot more information on the various subjects can be found by searching the Web with the right entry, which can be easily extracted from the corresponding subject. Good Luck!

References

Note: Not every reader has access to the published articles of microelectronic conferences and magazines. A lot of effort has therefore been given to refer to those publications that are directly accessible through web pages on the Internet. However, these data may be volatile because some owners update and change the contents on their web pages, so that some of the references below may only be accessible during a short time after the print of this book. Finally a lot more information on the various subjects can be found by searching the Web with the right entry, which can be easily extracted from the corresponding subject. Good Luck!

  1. Harry J.M. Veendrick, “Nanometer CMOS ICs, from Basics to ASICs”, ISBN 978-3-319-47597-4, Springer 2017

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  2. ITRS Roadmap Report, 2015 edition, https://www.semiconductors.org/main/2015_international_technology_roadmap_for_semiconductors_itrs/

  3. Jean-Pierre.Schoellkopf, “ATRS: an alternative roadmap for semiconductors, technology evolution and impacts on system architecture”, <http://tima.imag.fr/conferences/async/Technical_Program/Tuesday/Invited_talk_2/Async%202006%2014march06.pdf>

  4. Trevor Mudge, “Power: A First-Class Architectural Design Constraint”, <www.eecs.umich.edu/~panalyzer/pdfs/Power__A_First_Class_Design_Constraint.pdf>

  5. Richard van Noorden, “The rechargeable revolution: A better battery”, Nature, International Weekly Journal of Science, 05 March 2014

    Google Scholar 

  6. http://batteryuniversity.com, 2017

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Veendrick, H. (2019). Chip Performance and Power. In: Bits on Chips. Springer, Cham. https://doi.org/10.1007/978-3-319-76096-4_11

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  • DOI: https://doi.org/10.1007/978-3-319-76096-4_11

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-76095-7

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