An Overview on Recent Advances in Statistical Burn-In Modeling for Semiconductor Devices
In semiconductor manufacturing, the early life of the produced devices can be simulated by means of burn-in. In this way, early failures are screened out before delivery. To reduce the efforts associated with burn-in, the failure probability p in the early life of the devices is evaluated using a burn-in study. Classically, this is done by computing the exact Clopper–Pearson upper bound for p. In this chapter, we provide an overview on a series of new statistical models, which are capable of considering further available information (e.g., differently reliable chip areas) within the Clopper–Pearson estimator for p. These models help semiconductor manufacturers to more efficiently evaluate the early life failure probabilities of their products and therefore reduce the efforts associated with burn-in studies of new technologies.
KeywordsArea scaling Binomial distribution Burn-in Power semiconductors Sampling
The work has been performed in the project EPT300, co-funded by grants from Austria, Germany, Italy, The Netherlands and the ENIAC Joint Undertaking. This project is co-funded within the programme “Forschung, Innovation und Technologie für Informationstechnologie” by the Austrian Ministry for Transport, Innovation and Technology.
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