Advertisement

A Survey of Application Memory Usage on a National Supercomputer: An Analysis of Memory Requirements on ARCHER

  • Andy TurnerEmail author
  • Simon McIntosh-Smith
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 10724)

Abstract

In this short paper we set out to provide a set of modern data on the actual memory per core and memory per node requirements of the most heavily used applications on a contemporary, national-scale supercomputer. This report is based on data from all jobs run on the UK national supercomputing service, ARCHER, a 118,000 core Cray XC30, in the 1 year period from 1st July 2016 to 30th June 2017 inclusive. Our analysis shows that 80% of all usage on ARCHER has a maximum memory use of 1 GiB/core or less (24 GiB/node or less) and that there is a trend to larger memory use as job size increases. Analysis of memory use by software application type reveals differences in memory use between periodic electronic structure, atomistic N-body, grid-based climate modelling, and grid-based CFD applications. We present an analysis of these differences, and suggest further analysis and work in this area. Finally, we discuss the implications of these results for the design of future HPC systems, in particular the applicability of high bandwidth memory type technologies.

Keywords

HPC Memory Profiling 

References

  1. 1.
    Zivanovic, D., Pavlovic, M., Radulovic, M., Shin, H., Son, J., Mckee, S.A., Carpenter, P.M., Radojković, P., Ayguadé, E.: Main memory in HPC: Do we need more or could we live with less? ACM Trans. Archit. Code Optim. 14(1), March 2017. Article 3,  https://doi.org/10.1145/3023362
  2. 2.
    PRACE. Unified European Applications Benchmark Suite (2013). http://www.prace-ri.eu/ueabs/. Accessed 21 Sep 2017
  3. 3.
  4. 4.
    Booth, S.: Analysis and reporting of Cray service data using the SAFE. In: Cray User Group 2014 Proceedings. https://cug.org/proceedings/cug2014_proceedings/includes/files/pap135.pdf. Accessed 21 Sep 2017
  5. 5.
    ARCHER. Memory usage on the UK national supercomputer, ARCHER: analysis of all jobs and leading applications (2017). http://www.archer.ac.uk/documentation/white-papers/. Accessed 21 Sep 2017
  6. 6.
    Radulovic, M., Zivanovic, D., Ruiz, D., de Supinski, B.R., McKee, S.A., Radojković, P., Ayguadé, E.: Another trip to the wall: How Much will stacked DRAM benefit HPC? In: Proceedings of the 2015 International Symposium on Memory Systems (MEMSYS 2015), pp. 31–36. ACM, New York, NY, USA (2015).  https://doi.org/10.1145/2818950.2818955

Copyright information

© Springer International Publishing AG 2018

Authors and Affiliations

  1. 1.EPCCUniversity of EdinburghEdinburghUK
  2. 2.Department of Computer ScienceUniversity of BristolBristolUK

Personalised recommendations