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Optimization of Digital Circuits with Consideration of DF

  • Vazgen Melikyan
Chapter

Abstract

An algorithm for optimizing the critical timing paths of digital circuits, taking into account the influence of destabilizing factors with the minimal growth of power consumption by the circuit is described. The algorithm is tested on digital circuits of the ISCAS89 series. An algorithm to solve the problem of reducing the level of power consumption of digital circuits, taking into account the influence of destabilizing factors at the expense of the use of the speed margin in the design options of digital circuits is also described.

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Copyright information

© Springer International Publishing AG, part of Springer Nature 2018

Authors and Affiliations

  • Vazgen Melikyan
    • 1
  1. 1.Director of Educational DepartmentSynopsys Armenia CJSCYerevanArmenia

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