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Destructive Mechanisms in Power Devices

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Notes

  1. 1.

    Exception devices with cells (MOSFETS, IGBTs, MPS-diodes) in which the cell geometry is adjusted that the avalanche breakdown occurs first below the cells and not at the edge, see above.

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Authors and Affiliations

  1. Chair Power Electronics and Electromagnetic Compatibility, Faculty of ET/IT, Chemnitz University of Technology, Chemnitz, Sachsen, Germany

    Josef Lutz

  2. Neu-Isenburg, Germany

    Heinrich Schlangenotto

  3. Semikron Elektronik GmbH & Co. KG, Nuremberg, Germany

    Uwe Scheuermann

  4. Chair Power Generation and Storage Systems, Faculty of ET/IT, E.ON ERC, RWTH Aachen University, Aachen, Germany

    Rik De Doncker

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  1. Josef Lutz
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  2. Heinrich Schlangenotto
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  3. Uwe Scheuermann
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  4. Rik De Doncker
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Correspondence to Josef Lutz .

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Lutz, J., Schlangenotto, H., Scheuermann, U., De Doncker, R. (2018). Destructive Mechanisms in Power Devices. In: Semiconductor Power Devices. Springer, Cham. https://doi.org/10.1007/978-3-319-70917-8_13

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