Advertisement

Probing Techniques Based on Light Emission from Chip

  • Selahattin Sayil
Chapter
  • 368 Downloads

Abstract

Various contactless testing methodologies have been proposed to resolve many of the challenges associated with conventional mechanical wafer testing. Most of these methods offered, however, suffer from at least one of the limitations. For example, electron beam and photoemissive probe techniques suffer from the high equipment cost, the complex preparation steps, and logic bandwidth measurement limitations. Other techniques have limitations such as damaging risk, material limitations, and crosstalk. Therefore, researchers have sought alternative contactless methods such as the ones based on chip light emission. In the picosecond imaging circuit analysis or PICA technique, light pulses emitted by CMOS transistors in saturation during the switching events of individual gates are collected. The technique can detect timing-related defects in modern VLSI circuits. The LEOSCL (light emission from off-state leakage) technique observes the near-infrared light emission associated with the off-state leakage of transistor. Since the emission is brighter for an NMOS transistor compared to a PMOS, this information is used to detect logic states. Finally, a technique based on the integration of a silicon light emitter and a silicon photodiode on the device under test has been proposed to address the growing test problem. The uniqueness of this proposed method lies in the fact that it is fully an optical technique utilizing visible light and is completely compatible with standard silicon IC processing.

Keywords

Hot-carrier luminescence All-silicon optical test Picosecond imaging circuit analysis Pica Light emission from off-state leakage Leoscl 

References

  1. 1.
    J.C. Tsang, J.A. Kash, Picosecond hot electron light emission from CMOS circuits. Appl. Phys. Lett. 70(7), 889–891 (1997)CrossRefGoogle Scholar
  2. 2.
    J.C. Tsang, J.A. Kash, D.P. Vallett, Picosecond imaging circuit analysis. IBM J. Res. Develop. 44(4), 583–603 (2000)CrossRefGoogle Scholar
  3. 3.
    F. Stellari, F. Zappa, S. Cova, C. Porta, J.C. Tsang, High-speed CMOS circuit testing by 50 ps time-resolved luminescence measurements. IEEE Trans. Electron. Devices 48(12), 2830–2835 (2001)CrossRefGoogle Scholar
  4. 4.
    A. Tosi et al. Hot carrier photon emission in scaled CMOS technologies: a challenge for emission based testing and diagnosis, in Proceedings of 44th IEEE International Reliability Physics Symposium (IRPS 06), San Jose, CA, USA. pp. 595–601 (2006)Google Scholar
  5. 5.
    A. Agarwal, S. Mukhopadhyay, A. Raychowdhury, K. Roy, C.H. Kim, Leakage power analysis and reduction for nanoscale circuits. IEEE Micro 26(2), 68–80 (2006)CrossRefGoogle Scholar
  6. 6.
    F. Stellari, P. Song, J.C. Tsang, M.K. McManus, M.B. Ketchen, Testing and diagnostics of CMOS circuits using light emission from off-state leakage current. IEEE Trans. Electron Devices 51(9), 1455–1462 (2004)CrossRefGoogle Scholar
  7. 7.
    S. Sayil, D.V. Kerns, S.E. Kerns, Comparison of contactless measurement and testing techniques to a new all-silicon optical test and characterization method. IEEE Trans. Instrum. Meas. 54(5), 2082–2089 (2005)CrossRefGoogle Scholar
  8. 8.
    N. Akil, S.E. Kerns, D.V. Kerns, A. Hoffmann, J.-P. Charles, A multimechanism model for photon generation by silicon junctions in avalanche breakdown. IEEE Trans. Electron Devices 46(5), 1022–1028 (1999)CrossRefGoogle Scholar

Copyright information

© Springer International Publishing AG 2018

Authors and Affiliations

  • Selahattin Sayil
    • 1
  1. 1.Lamar UniversityBeaumontUSA

Personalised recommendations