Abstract
To capture and analyze applications’ memory behaviors with low overhead plays a vital role in managing and scheduling memory resources on modern computer systems. In this paper, we re-design SysMon based on [13, 14], which is an OS-level memory behaviors monitoring module in existing OS, and modify its several core components to meet the challenges of higher efficiency and accuracy. SysMon can be used without offline profiling, instrumentation or configuring complex parameters. We evaluate SysMon by making a great deal of experiments on SPECCPU 2006 [7], Memcached [1] and Redis [6]. The experimental results show that, by using SysMon, we can efficiently capture the memory footprint, write/read operations, hot/cold features, re-use time, bank hotness/bank balance, etc. Besides, we collect the memory access behaviors in the configuration of different sampling intervals, and draw a conclusion that using a 3 s interval can obtain information accurately with low overhead. Finally, to reduce the scanning overhead during samplings, SysMon adopts a randomization method, and scans only a portion of pages. Experiments show that the sampling overhead can be reduced by 44.42% on average while guaranteeing the accuracy of sampling.
This work is supported by NSF of China under grants No. 61502452 (PI: Lei Liu).
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Memcached. http://memcached.org
Oprofile. http://oprofile.sourceforge.net/news/
PAPI. http://icl.utk.edu/papi/
Perfmon2. http://perfmon2.sourceforge.net/
Pin. https://software.intel.com/en-us/articles/pin-a-dynamic-binary-instrumentation-tool
Redis. http://redis.io/
SPECCPU2006. http://www.spec.org/cpu2006
Delimitrou, C., Kozyrakis, C.: Quasar: resource-efficient and QoS-aware cluster management. In: ASPLOS (2014)
Duong, N., Zhao, D., Kim, T., et al.: Improving cache management policies using dynamic reuse distances. In: MICRO (2012)
Jaleel, A., Najaf-Abadi, H.H., Subramaniam, S., Steely, S.C., Emer, J.: CRUISE: cache replacement and utility-aware scheduling. In: ASPLOS (2012)
Kwon, Y., Yu, H., Peter, S., Rossbach, C.J., Witchel, E.: Coordinated and efficient huge page management with ingens. In: OSDI (2016)
Lin, F.X., Liu, X.: Memif: towards programming heterogeneous memory asynchronously. In: ASPLOS (2016)
Liu, L., Yang, H., Li, Y., Xie, M., Li, L. Wu, C.: Memos: a full hierarchy hybrid memory management framework. In: ICCD (2016)
Liu, L., Li, Y., Ding, C., Yang, H., Wu, C.: Rethinking memory management in modern operating system: horizontal, vertical or random? TC 65, 1926–1935 (2016)
Liu, L., Cui, Z., Li, Y., et al.: BPM/BPM+: software-based dynamic memory partitioning mechanisms for mitigating DRAM bank-/channel-level interferences in multicore systems. ACM Trans. Archit. Code Optim. (TACO) 11(1), 5 (2014)
Liu, L., Li, Y., Cui, Z., Wu, C., et al.: Going vertical in memory management: handling multiplicity by multi-policy. In: ISCA (2014)
Liu, L., Cui, Z., Xing, M., Wu, C., et al.: A software memory partition approach for eliminating bank-level interference in multicore systems. In: PACT (2012)
Lee, S., Bahn, H., Noh, S.H.: CLOCK-DWF: a write-history-aware page replacement algorithm for hybrid PCM and DRAM memory architectures. TC 63, 2187–2200 (2014)
Liu, L., Xie, M., Yang, H.: Memos: revisiting hybrid memory management in modern operating system. arXiv:1703.07725 (2017)
Lv, F., Liu, L., et al.: WiseThrottling: a new asynchronous task scheduler for mitigating I/O bottleneck in large-scale datacenter servers. J. Supercomput. 71, 3054–3093 (2015)
Lv, F., Cui, H., Wang, L., Liu, L., et al.: Dynamic I/O-aware scheduling for batch-mode applications on chip multiprocessor systems of cluster platforms. JCST 29, 21–37 (2014)
Liu, L.: Tackling diversity and heterogeneity by vertical memory management. arXiv:1704.01198 (2017)
Liang, Y., Li, X.: Efficient kernel management on GPUs. ACM Trans. Embed. Comput. Syst. (TECS) 16(4), 115 (2017)
Mai, H.T., Park, K.H., Lee, H.S., Kim, C.S., Lee, M., Hur, S.J.: Dynamic data migration in hybrid main memories for in-memory big data storage. ETRI J. 36, 988–998 (2014)
Mutlu, O.: Main memory scaling: challenges and solution directions. In: Topaloglu, R. (ed.) More than Moore Technologies for Next Generation Computer Design, pp. 127–153. Springer, New York (2015). doi:10.1007/978-1-4939-2163-8_6
Rixner, S., Dally, W.J., Kapasi, U.J., et al.: Memory access scheduling. ACM SIGARCH Comput. Archit. News 28(2), 128–138 (2000). ACM
Sun, G., Zhang, C., Li, P., et al.: Statistical cache bypassing for non-volatile memory. IEEE Trans. Comput. 65(11), 3427–3440 (2016)
Mi, W., Feng, X., Xue, J., Jia, Y.: Software-hardware cooperative DRAM bank partitioning for chip multiprocessors. In: Ding, C., Shao, Z., Zheng, R. (eds.) NPC 2010. LNCS, vol. 6289, pp. 329–343. Springer, Heidelberg (2010). doi:10.1007/978-3-642-15672-4_28
Kim, Y., Seshadri, V., Lee, D., Liu, J., Mutlu, O.: A case for exploiting subarray-level parallelism (SALP) in DRAM. ACM SIGARCH Comput. Archit. News 40(3), 368–379 (2012)
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Xie, M., Liu, L., Yang, H., Wu, C., Geng, H. (2017). SysMon: Monitoring Memory Behaviors via OS Approach. In: Dou, Y., Lin, H., Sun, G., Wu, J., Heras, D., Bougé, L. (eds) Advanced Parallel Processing Technologies. APPT 2017. Lecture Notes in Computer Science(), vol 10561. Springer, Cham. https://doi.org/10.1007/978-3-319-67952-5_5
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DOI: https://doi.org/10.1007/978-3-319-67952-5_5
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