Skip to main content

VCO-Based ADCs

  • Chapter
  • First Online:
  • 1309 Accesses

Part of the book series: Signals and Communication Technology ((SCT))

Abstract

With CMOS technology scaling, the analog and mixed-signal circuits face more and more design challenges and suffer a lot in accuracy. At the same time, digital circuits benefit from technology scaling in terms of improved timing accuracy and reduced power consumption.

This is a preview of subscription content, log in via an institution.

Buying options

Chapter
USD   29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD   84.99
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD   109.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD   109.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Learn about institutional subscriptions

References

  1. V.B. Boros, A digital proportional integral, and derivative feedback controller for power conditioning equipment, in IEEE Power Electronics Specialists Conference (1977), pp. 135–141

    Google Scholar 

  2. J.P. Hurrell, D.C. Pridmore-Brown, A.H. Silver, Analog-to-digital conversion with unlatched SQUID’s. IEEE Trans. Electron Devices 27(10), 1887–1896 (1980)

    Google Scholar 

  3. M. Hovin, A. Olsen, T.S. Lande, C. Toumazou, Delta-sigma modulators using frequency-modulated intermediate values. IEEE J. Solid-State Circuits 32(1), 13–22 (1997)

    Google Scholar 

  4. M.Z. Straayer, M.H. Perrott, A 12-bits, 10-MHz bandwidth, continuous-time Delta-Sigma ADC with a 5-bits, 950-MS/s VCO-based quantizer. IEEE J. Solid-State Circuits 43(4), 805–814 (2008)

    Google Scholar 

  5. M.Z. Straayer, M.H. Perrott, A 10-bit 20-MHz 38-mW 950-MHz CT \(\varDelta \varSigma \) ADC with a 5-bit noise-shaping VCO-based quantizer and DEM circuit in 0.13-\(\upmu \)m CMOS, in VLSI Symposium Dig. (2007), pp. 246–247

    Google Scholar 

  6. J. Kim, T.K. Jang, Y.G. Yoon, S.H. Cho, Analysis and design of voltage-controlled oscillator based analog-to-digital converter. IEEE Trans. Circuits Syst. I Regul. Pap. 57(1), 18–30 (2010)

    Google Scholar 

  7. M. Park, M.H. Perrott, A 0.13 \(\upmu \)m CMOS 78 dB SNDR 87 mW 20 MHz BW CT \(\varDelta \varSigma \) ADC with VCO-based integrator and quantizer, in 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, ISSCC (2009), pp. 170–171

    Google Scholar 

  8. M. Park, M.H. Perrott, A 78 dB SNDR 87 mW 20 MHz bandwidth continuous-time \(\varDelta \varSigma \) ADC with VCO-based integrator and quantizer implemented in 0.13 \(\upmu \)m CMOS. IEEE J. Solid-State Circuits 44(12), 3344–3358 (2009)

    Google Scholar 

  9. K. Reddy, Rao S., R. Inti, B. Young, A. Elshazly, M. Talegaonkar, P.K. Hanumolu, A 16 mW 78 dB-SNDR 10 MHz-BW CT-DSM ADC using residue-cancelling VCO-based quantizer, in 2012 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC) (2012), pp. 152–154

    Google Scholar 

  10. K. Reddy, Rao S., R. Inti, B. Young, A. Elshazly, M. Talegaonkar, P.K. Hanumolu, A 16-mW 78-dB SNDR 10-MHz BW CT \(\varDelta \varSigma \) ADC using residue-cancelling VCO-based quantizer. IEEE J. Solid-State Circuits, 47(12), 2916–2927 (2012)

    Google Scholar 

  11. G. Taylor, I. Galton, A mostly-digital variable-rate continuous-time ADC \(\varDelta \varSigma \) modulator, in 2010 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC) (2010), pp. 298–299

    Google Scholar 

  12. G. Taylor, I. Galton, A mostly-digital variable-rate continuous-time Delta-Sigma modulator ADC. IEEE J. Solid-State Circuits 45(12), 2634–2646 (2010)

    Google Scholar 

  13. J. Daniels, W. Dehaene, M. Steyaert, A. Wiesbauer, A 0.02 mm\(^2\) 65 nm CMOS 30 MHz BW all-digital differential VCO-based ADC with 64 dB SNDR, in 2010 IEEE Symposium on VLSI Circuits (VLSIC) (2010), pp. 155–156

    Google Scholar 

  14. L. Hernandez, S. Paton, E. Prefasi, VCO-based sigma-delta modulator with PWM precoding. Electron. Lett. 47(10), 588–589 (2011)

    Google Scholar 

  15. S. Rao, B. Young, A. Elshazly, W. Yin, N. Sasidhar, P.K.Hanumolu, A 71 dB SFDR open-loop VCO-based ADC using 2-level PWM modulation, in 2011 Symposium on VLSI Circuits (VLSIC) (2011), pp. 270–271

    Google Scholar 

  16. P. Gao, X. Xing, J. Craninckx, G. Gielen, Design of an intrinsically-linear double-VCO-based ADC with 2nd-order noise shaping, in 2012 Design, Automation and Test in Europe Conference and Exhibition (DATE) (2012), pp. 1215–1220

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Xinpeng Xing .

Rights and permissions

Reprints and permissions

Copyright information

© 2018 Springer International Publishing AG

About this chapter

Cite this chapter

Xing, X., Zhu, P., Gielen, G. (2018). VCO-Based ADCs. In: Design of Power-Efficient Highly Digital Analog-to-Digital Converters for Next-Generation Wireless Communication Systems. Signals and Communication Technology. Springer, Cham. https://doi.org/10.1007/978-3-319-66565-8_4

Download citation

  • DOI: https://doi.org/10.1007/978-3-319-66565-8_4

  • Published:

  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-66564-1

  • Online ISBN: 978-3-319-66565-8

  • eBook Packages: EngineeringEngineering (R0)

Publish with us

Policies and ethics