Abstract
Integrated circuits (IC) is a multi-disciplinary and multi-level industry, which is composed of product definition, system design, circuit design, electronic design automation (EDA), chip fabrication, package, and test.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
I.A. Young, E. Mohammed, J.T.S. Liao, A.M. Kern, S. Palermo, B.A. Block, M.R. Reshotko, P.L.D. Chang, Optical I/O technology for tera-scale computing solid-state circuits. IEEE J. 45(1), 235–248 (2010)
ATT: ATT u-verse-digital TV, high speed internet and voice (2012), http://www.att.com/shop/u-verse.html
P. Crombez, Full reconfigurable analog baseband circuits for multimode radios, KU Leuven Thesis (2009)
S. McGlaun, Tablet shipments to outpace total PC shipments in Q4 2013 says IDC, https://www.slashgear.com/tablet-shipments-to-outpace-total-pc-shipments-in-q4-2013-says-idc-12297574/
F. Wanlass, Low stand-by power complementary field effect circuitry, US Patent 3356858 (1967)
M. Gordon, Cramming more components onto integrated circuits, Electronics Magazine (1965)
W. Zhao, Y. Cao, New generation of predictive technology model for sub-45 nm early design exploration. IEEE Trans. Electron Devices 53(11), 2816–2823 (2006)
W. Sansen, Analog design essentials (Springer, 2008)
K. Cornelissens, Delta-Sigma A/D converter design in nanoscale CMOS, KU Leuven Thesis (2010)
ITRS, International technology roadmap for semiconductors (2012), http://www.itrs.net/Links/2012ITRS/Home2012.htm,2012
J.L. Hogan, Developments of the heterodyne receiver. Proc. Inst. Radio Eng. 3(3), 249–259 (1915)
A.A. Abidi, Direct-conversion radio transceivers for digital communications. IEEE J. Solid-State Circ. 30(12), 1399–1410 (1995)
J. Crols, M.S.J. Steyaert, single-chip 900 MHz CMOS receiver front-end with a high performance low-IF topology. IEEE J. Solid-State Circuits 30(12), 1483–1492 (1995)
T. Chalvatzis, T.O. Dickson, S.P. Voinigescu, 2-GHz direct-sampling delta-sigma tunable receiver with 40-GHz sampling clock and on-chip PLL, in 2007 IEEE Symposium on VLSI Circuits (2007), pp. 54–55
B. Grayver, E. Daneshrad, VLSI implementation of a 100-\(\upmu \)w multirate FSK receiver. IEEE J. Solid-State Circuits, 36(11), 1821–1828 (2001)
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
Copyright information
© 2018 Springer International Publishing AG
About this chapter
Cite this chapter
Xing, X., Zhu, P., Gielen, G. (2018). Introduction. In: Design of Power-Efficient Highly Digital Analog-to-Digital Converters for Next-Generation Wireless Communication Systems. Signals and Communication Technology. Springer, Cham. https://doi.org/10.1007/978-3-319-66565-8_1
Download citation
DOI: https://doi.org/10.1007/978-3-319-66565-8_1
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-319-66564-1
Online ISBN: 978-3-319-66565-8
eBook Packages: EngineeringEngineering (R0)