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PARAD Repository: On the Capitalization of the Performance Analysis Process for AADL Designs

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Software Architecture (ECSA 2017)

Part of the book series: Lecture Notes in Computer Science ((LNPSE,volume 10475))

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Abstract

In this paper, we focus on RTES (real-time embedded systems) designs expressed in AADL (Architecture and Analysis Design Language) and we propose a model-based approach to improve the way that designers check and analyze the performance of their system designs by capitalizing the analysis process. Our approach is based on proposing customized repositories of models using formal AADL-compliant query and constraint languages in order to orient designers to choose the most suitable analysis models and tests. Furthermore, this work is also dedicated to research teams to share their researches and prototypes, in order to enhance the (re-)usability of the real-time performance analysis tests.

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Notes

  1. 1.

    We have analyzed papers published in the main real-time system conferences like: RTSS (rtss.org), ECRTS (ecrts.eit.uni-kl.de) and RTAS (rtas.org).

  2. 2.

    https://forge.lias-lab.fr/projects/parad.

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Acknowledgements

This work is co-funded through the Waruna project by the French Ministry of the Economy, Finances and Industry, and by the PIA CORAC Panda project.

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Correspondence to Yassine Ouhammou .

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Nguyen, T.D., Ouhammou, Y., Grolleau, E. (2017). PARAD Repository: On the Capitalization of the Performance Analysis Process for AADL Designs. In: Lopes, A., de Lemos, R. (eds) Software Architecture. ECSA 2017. Lecture Notes in Computer Science(), vol 10475. Springer, Cham. https://doi.org/10.1007/978-3-319-65831-5_2

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  • DOI: https://doi.org/10.1007/978-3-319-65831-5_2

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