Abstract
Today’s Real-Time Systems’ (RTSs) increasing speed and complexity make debugging of timing related faults one of the most challenging engineering tasks. Debugging starts with capturing the fault symptoms, which requires continuous cycle-accurate execution traces. However, due to limitations of on-chip buffers’ area and output ports’ throughput, these cannot be obtained easily.
This paper introduces an approach that divides the tracing into two tasks, monitoring on-chip execution to retrieve accurate timing information and high level functional simulation to retrieve signal contents. A semi-formal cycle-accurate reconstruction method uses these two sources to retrieve a complete, cycle-accurate trace of a given signal. An experiment illustrates how this method allows the cycle-accurate reconstruction of on-chip traces of a Real-Time Autonomous-Guided-Vehicle software.
This work was supported by the University of Bremen’s graduate school SyDe funded by the German Excellence Initiative, the German Federal Ministry of Education and Research (BMBF) within the project 01IW16001 (SELFIE), the German Research Foundation (DFG) within the Reinhart Koselleck project DR 287/23-1 and the German Academic Exchange Service (DAAD).
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Notes
- 1.
www.sams-project.org, the module is certified for use in safety systems up to SIL-3 according to IEC EN 61508.
- 2.
Note that using interrupts to alter the execution is not recommended for safety critical software in general. However, it could be unavoidable to fulfill a hard requirement of responding to external changes instantaneously not via pulling.
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Massoud, R., Stoppe, J., Große, D., Drechsler, R. (2017). Semi-formal Cycle-Accurate Temporal Execution Traces Reconstruction. In: Abate, A., Geeraerts, G. (eds) Formal Modeling and Analysis of Timed Systems. FORMATS 2017. Lecture Notes in Computer Science(), vol 10419. Springer, Cham. https://doi.org/10.1007/978-3-319-65765-3_19
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